| /external/llvm/test/CodeGen/X86/ |
| promote-trunc.ll | 4 %F = load <4 x i64>* undef
5 %G = trunc <4 x i64> %F to <4 x i8>
6 %H = load <4 x i64>* undef
7 %Y = trunc <4 x i64> %H to <4 x i8>
|
| x86-64-and-mask.ll | 3 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
10 define i64 @test(i64 %x) nounwind {
12 %tmp123 = and i64 %x, 4294967295 ; <i64> [#uses=1]
13 ret i64 %tmp123
20 define void @bbb(i64 %x) nounwind {
21 %t = and i64 %x, 4294967295
22 call void @foo(i64 %t)
32 declare void @foo(i64 %x) nounwin
[all...] |
| x86-64-extend-shift.ll | 4 define i64 @baz(i32 %A) nounwind {
7 %tmp2 = zext i32 %tmp1 to i64
8 %tmp3 = shl i64 %tmp2, 32
9 ret i64 %tmp3
|
| avx-bitcast.ll | 5 define i64 @bitcasti64tof64() {
7 %b = bitcast double %a to i64
8 ret i64 %b
|
| vec_compare-sse4.ll | 5 define <2 x i64> @test1(<2 x i64> %A, <2 x i64> %B) nounwind {
16 %C = icmp sgt <2 x i64> %A, %B
17 %D = sext <2 x i1> %C to <2 x i64>
18 ret <2 x i64> %D
21 define <2 x i64> @test2(<2 x i64> %A, <2 x i64> %B) nounwind {
32 %C = icmp eq <2 x i64> %A, %
[all...] |
| vec_set-F.ll | 5 define <2 x i64> @t1(<2 x i64>* %ptr) nounwind {
6 %tmp45 = bitcast <2 x i64>* %ptr to <2 x i32>*
8 %tmp7 = bitcast <2 x i32> %tmp615 to i64
9 %tmp8 = insertelement <2 x i64> zeroinitializer, i64 %tmp7, i32 0
10 ret <2 x i64> %tmp8
13 define <2 x i64> @t2(i64 %x) nounwind {
14 %tmp717 = bitcast i64 %x to doubl
[all...] |
| x86-64-frameaddr.ll | 3 define i64* @stack_end_address() nounwind {
6 bitcast i8* %0 to i64*
7 ret i64* %1
|
| lock-inst-encoding.ll | 3 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
9 define void @f1(i64* %a, i64 %b) nounwind {
10 %1 = atomicrmw add i64* %a, i64 %b monotonic
17 define void @f2(i64* %a, i64 %b) nounwind {
18 %1 = atomicrmw sub i64* %a, i64 %b monotonic
25 define void @f3(i64* %a, i64 %b) nounwind
[all...] |
| shift-double.ll | 4 define i64 @test1(i64 %X, i8 %C) {
5 %shift.upgrd.1 = zext i8 %C to i64 ; <i64> [#uses=1]
6 %Y = shl i64 %X, %shift.upgrd.1 ; <i64> [#uses=1]
7 ret i64 %Y
10 define i64 @test2(i64 %X, i8 %C) {
11 %shift.upgrd.2 = zext i8 %C to i64 ; <i64> [#uses=1
[all...] |
| 2009-10-19-EmergencySpill.ll | 5 %struct.RtreeCell = type { i64, [10 x %union.RtreeCoord] }
7 %struct.RtreeNode = type { i32*, i64, i32, i32, i8*, i32* }
15 %4 = sext i32 %3 to i64 ; <i64> [#uses=2]
16 %5 = load i64* null, align 8 ; <i64> [#uses=2]
17 %6 = lshr i64 %5, 48 ; <i64> [#uses=1]
18 %7 = trunc i64 %6 to i8 ; <i8> [#uses=1]
20 %8 = lshr i64 %5, 8 ; <i64> [#uses=1
[all...] |
| /external/llvm/test/Transforms/InstCombine/ |
| 2007-08-02-InfiniteLoop.ll | 4 define i64 @test(i16 %tmp510, i16 %tmp512) {
8 %Z = sext i32 %Y to i64 ; <i64> [#uses=1]
9 ret i64 %Z
|
| 2011-03-08-SRemMinusOneBadOpt.ll | 4 define i32 @test(i64 %x) nounwind {
7 %or = or i64 %x, 4294967294
8 %conv = trunc i64 %or to i32
|
| multi-use-or.ll | 7 %sx34 = bitcast double %sx to i64 ; <i64> [#uses=1]
8 %sx3435 = zext i64 %sx34 to i192 ; <i192> [#uses=1]
9 %sy22 = bitcast double %sy to i64 ; <i64> [#uses=1]
10 %sy2223 = zext i64 %sy22 to i192 ; <i192> [#uses=1]
15 %a = trunc i192 %sy222324.ins to i64 ; <i64> [#uses=1]
16 %b = bitcast i64 %a to double ; <double> [#uses=1]
18 %d = trunc i192 %c to i64 ; <i64> [#uses=1
[all...] |
| vector-casts.ll | 4 define <2 x i1> @test1(<2 x i64> %a) {
5 %t = trunc <2 x i64> %a to <2 x i1>
9 ; CHECK: and <2 x i64> %a, <i64 1, i64 1>
10 ; CHECK: icmp ne <2 x i64> %1, zeroinitializer
14 define <2 x i64> @test2(<2 x i64> %a) {
15 %b = and <2 x i64> %a, <i64 65535, i64 65535
[all...] |
| /external/llvm/test/Transforms/SCCP/ |
| ipsccp-basic.ll | 79 define internal {i64,i64} @test4a() {
80 %a = insertvalue {i64,i64} undef, i64 4, 1
81 %b = insertvalue {i64,i64} %a, i64 5, 0
82 ret {i64,i64} %
[all...] |
| /external/llvm/test/Transforms/SimplifyCFG/ |
| speculate-with-offset.ll | 11 %a = alloca [4 x i64*], align 8
12 %__a.addr = getelementptr [4 x i64*]* %a, i64 0, i64 3
13 call void @frob(i64** %__a.addr)
20 %tmp5 = load i64** %__a.addr, align 8
24 %storemerge = phi i64* [ undef, %if.then ], [ %tmp5, %if.end ]
33 %a = alloca [4 x i64*], align 8
34 %__a.addr = getelementptr [4 x i64*]* %a, i64 0, i64
[all...] |
| /external/llvm/test/Analysis/ScalarEvolution/ |
| undefined.ll | 6 define void @foo(i64 %x) {
8 %a = udiv i64 %x, 0
11 %B = shl i64 %x, 64
14 %b = ashr i64 %B, 64
17 %c = lshr i64 %x, 64
20 %d = shl i64 %x, 64
23 %E = shl i64 %x, -1
26 %e = ashr i64 %E, -1
29 %f = lshr i64 %x, -1
32 %g = shl i64 %x, -
[all...] |
| /external/llvm/test/Assembler/ |
| 2009-03-24-ZextConstantExpr.ll | 6 call zeroext i1 @paging_map(i64 zext (i32 and (i32 ptrtoint ([0 x i8]* @gdtr to i32), i32 -4096) to i64))
10 declare zeroext i1 @paging_map(i64)
|
| /external/llvm/test/CodeGen/ARM/ |
| 2011-08-29-SchedCycle.ll | 3 ; When a i64 sub is expanded to subc + sube.
35 %tmp = load i64* undef, align 4
36 %tmp5 = udiv i64 %tmp, 30
37 %tmp13 = and i64 %tmp5, 64739244643450880
38 %tmp16 = sub i64 0, %tmp13
39 %tmp19 = and i64 %tmp16, 63
40 %tmp20 = urem i64 %tmp19, 3
41 %tmp22 = and i64 %tmp16, -272346829004752
42 store i64 %tmp22, i64* undef, align
[all...] |
| sub.ll | 4 define i64 @f1(i64 %a) {
8 %tmp = sub i64 %a, 171
9 ret i64 %tmp
13 define i64 @f2(i64 %a) {
17 %tmp = sub i64 %a, 66846720
18 ret i64 %tmp
22 define i64 @f3(i64 %a)
[all...] |
| /external/llvm/test/CodeGen/Alpha/ |
| 2008-11-10-smul_lohi.ll | 3 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f128:128:128"
6 define i64 @__mulvdi3(i64 %a, i64 %b) nounwind {
8 %0 = sext i64 %a to i128 ; <i128> [#uses=1]
9 %1 = sext i64 %b to i128 ; <i128> [#uses=1]
12 %4 = trunc i128 %3 to i64 ; <i64> [#uses=1]
13 %5 = trunc i128 %2 to i64 ; <i64> [#uses=1
[all...] |
| /external/llvm/test/CodeGen/PowerPC/ |
| fp-int-fp.ll | 4 %Y = fptosi double %X to i64 ; <i64> [#uses=1]
5 %Z = sitofp i64 %Y to double ; <double> [#uses=1]
10 %Y = fptosi double %X to i64 ; <i64> [#uses=1]
11 %Z = sitofp i64 %Y to float ; <float> [#uses=1]
16 %Y = fptosi float %X to i64 ; <i64> [#uses=1]
17 %Z = sitofp i64 %Y to double ; <double> [#uses=1]
22 %Y = fptosi float %X to i64 ; <i64> [#uses=1
[all...] |
| /external/llvm/test/Transforms/GlobalOpt/ |
| ctor-list-opt-inbounds.ll | 16 store i32 1, i32* getelementptr ([6 x [5 x i32]]* @G, i64 0, i64 0, i64 0)
17 store i32 2, i32* getelementptr inbounds ([6 x [5 x i32]]* @G, i64 0, i64 0, i64 0)
18 %t = load i32* getelementptr ([6 x [5 x i32]]* @G, i64 0, i64 0, i64 0)
20 %s = load i32* getelementptr inbounds ([6 x [5 x i32]]* @G, i64 0, i64 0, i64 0
[all...] |
| /external/llvm/test/CodeGen/CellSPU/ |
| immed64.ll | 17 target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
26 define i64 @i64_const_1() {
27 ret i64 1311768467750121234 ;; Constant pool spill
30 define i64 @i64_const_2() {
31 ret i64 18446744073709551591 ;; IL/SHUFB
34 define i64 @i64_const_3() {
35 ret i64 18446744073708516742 ;; IHLU/IOHL/SHUFB
38 define i64 @i64_const_4() {
39 ret i64 5308431 ;; ILHU/IOHL/SHUFB
42 define i64 @i64_const_5()
[all...] |
| /external/llvm/test/CodeGen/SystemZ/ |
| 05-MemRegLoads.ll | 10 target datalayout = "E-p:64:64:64-i1:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128"
13 define zeroext i64 @foo1(i64* nocapture %a, i64 %idx) nounwind readonly {
15 %add.ptr.sum = add i64 %idx, 1 ; <i64> [#uses=1]
16 %add.ptr2 = getelementptr i64* %a, i64 %add.ptr.sum ; <i64*> [#uses=1]
17 %tmp3 = load i64* %add.ptr2 ; <i64> [#uses=1
[all...] |
