| /external/llvm/test/CodeGen/X86/ |
| lsr-nonaffine.ll | 16 define i64 @foo(i64 %n, i64 %s, i64* %p) nounwind {
21 %i = phi i64 [ 0, %entry ], [ %i.next, %loop ]
22 volatile store i64 %i, i64* %p
23 %i.next = add i64 %i, %s
24 %c = icmp slt i64 %i.next, %n
28 %mul = mul i64 %i.next, %i.nex
[all...] |
| change-compare-stride-trickiness-2.ll | 4 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
7 %struct.dumperinfo = type <{ i32 (i8*, i8*, i64, i64, i64)*, i8*, i32, i32, i64, i64 }>
17 %indvar688 = phi i64 [ 0, %if.end ], [ %indvar.next689, %if.end52 ] ; <i64> [#uses=3]
18 %tmp690 = shl i64 %indvar688, 12 ; <i64> [#uses=1
[all...] |
| i64-mem-copy.ll | 8 ; Uses movsd to load / store i64 values if sse2 is available.
12 define void @foo(i64* %x, i64* %y) nounwind {
14 %tmp1 = load i64* %y, align 8 ; <i64> [#uses=1]
15 store i64 %tmp1, i64* %x, align 8
|
| legalizedag_vec.ll | 6 ; v2i64 is a legal type but with mmx disabled, i64 is an illegal type. When
8 ; two 64 bit divide library calls which introduces i64 nodes that needs to be
11 define <2 x i64> @test_long_div(<2 x i64> %num, <2 x i64> %div) {
12 %div.r = sdiv <2 x i64> %num, %div
13 ret <2 x i64> %div.r
|
| vfcmp.ll | 6 %A = fcmp olt <2 x double> zeroinitializer, zeroinitializer ; <<2 x i64>>:1 [#uses=1]
7 sext <2 x i1> %A to <2 x i64>
8 extractelement <2 x i64> %1, i32 1 ; <i64>:2 [#uses=1]
9 lshr i64 %2, 63 ; <i64>:3 [#uses=1]
10 trunc i64 %3 to i1 ; <i1>:4 [#uses=1]
|
| code_placement.ll | 10 %1 = getelementptr i32* %rk, i64 1 ; <i32*> [#uses=1]
13 %tmp.16 = zext i32 %tmp15 to i64 ; <i64> [#uses=2]
19 %indvar = phi i64 [ 0, %entry ], [ %indvar.next, %bb1 ] ; <i64> [#uses=3]
22 %tmp18 = shl i64 %indvar, 4 ; <i64> [#uses=4]
25 %4 = zext i32 %3 to i64 ; <i64> [#uses=1]
26 %5 = getelementptr [256 x i32]* @Te0, i64 0, i64 %4 ; <i32*> [#uses=1
[all...] |
| lsr-loop-exit-cond.ll | 13 %1 = getelementptr i32* %rk, i64 1 ; <i32*> [#uses=1]
16 %tmp.16 = zext i32 %tmp15 to i64 ; <i64> [#uses=2]
20 %indvar = phi i64 [ 0, %entry ], [ %indvar.next, %bb1 ] ; <i64> [#uses=3]
23 %tmp18 = shl i64 %indvar, 4 ; <i64> [#uses=4]
26 %4 = zext i32 %3 to i64 ; <i64> [#uses=1]
27 %5 = getelementptr [256 x i32]* @Te0, i64 0, i64 %4 ; <i32*> [#uses=1
[all...] |
| /external/llvm/test/Analysis/BasicAA/ |
| 2003-11-04-SimpleCases.ll | 10 %A = getelementptr %T* %P, i64 0
11 %B = getelementptr %T* %P, i64 0, i32 0
12 %C = getelementptr %T* %P, i64 0, i32 1
13 %D = getelementptr %T* %P, i64 0, i32 1, i64 0
14 %E = getelementptr %T* %P, i64 0, i32 1, i64 5
|
| /external/llvm/test/CodeGen/ARM/ |
| 2010-05-14-IllegalType.ll | 3 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:64:64-v128:128:128-a0:0:32-n32"
6 define <4 x i64> @f_4_i64(<4 x i64> %a, <4 x i64> %b) nounwind {
7 ; CHECK: vadd.i64
8 %y = add <4 x i64> %a, %b
9 ret <4 x i64> %y
|
| 2010-05-17-FastAllocCrash.ll | 10 %struct.CHESS_POSITION = type { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32, i32, i8, i8, [64 x i8], i8, i8, i8, i8, i8
[all...] |
| debug-info-arg.ll | 4 target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:32:64-v128:32:128-a0:0:32-n32"
9 define void @foo(%struct.tag_s* nocapture %this, %struct.tag_s* %c, i64 %x, i64 %y, %struct.tag_s* nocapture %ptr1, %struct.tag_s* nocapture %ptr2) nounwind ssp {
10 tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %this}, i64 0, metadata !5), !dbg !20
11 tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %c}, i64 0, metadata !13), !dbg !21
12 tail call void @llvm.dbg.value(metadata !{i64 %x}, i64 0, metadata !14), !dbg !22
13 tail call void @llvm.dbg.value(metadata !{i64 %y}, i64 0, metadata !17), !dbg !23
15 tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %ptr1}, i64 0, metadata !18), !dbg !2
[all...] |
| 2008-11-18-ScavengerAssert.ll | 3 define hidden i64 @__muldi3(i64 %u, i64 %v) nounwind {
5 %0 = trunc i64 %u to i32 ; <i32> [#uses=1]
8 %asmresult116 = zext i32 %asmresult1 to i64 ; <i64> [#uses=1]
9 %asmresult116.ins = or i64 0, %asmresult116 ; <i64> [#uses=1]
10 %1 = lshr i64 %v, 32 ; <i64> [#uses=1
[all...] |
| /external/llvm/test/CodeGen/SystemZ/ |
| 2009-06-02-And32Imm.ll | 4 define i32 @gnu_dev_major(i64 %__dev) nounwind readnone {
6 %shr = lshr i64 %__dev, 8 ; <i64> [#uses=1]
7 %shr8 = trunc i64 %shr to i32 ; <i32> [#uses=1]
8 %shr2 = lshr i64 %__dev, 32 ; <i64> [#uses=1]
9 %conv = trunc i64 %shr2 to i32 ; <i32> [#uses=1]
|
| /external/llvm/test/Linker/ |
| 2008-07-06-AliasWeakDest2.ll | 4 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
9 define i64 @sched_clock_cpu(i32 inreg %cpu) nounwind {
11 %tmp = call i64 @sched_clock( ) nounwind ; <i64>
12 ret i64 %tmp
15 define weak i64 @sched_clock() {
17 ret i64 1
|
| /external/llvm/test/Transforms/InstCombine/ |
| srem1.ll | 9 %conv = sext i32 %call to i64 ; <i64> [#uses=1]
10 %or = or i64 -1734012817166602727, %conv ; <i64> [#uses=1]
11 %rem = srem i64 %or, 1 ; <i64> [#uses=1]
12 %cmp = icmp eq i64 %rem, 1 ; <i1> [#uses=1]
|
| bitcast.ll | 3 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
8 define i32 @test1(i64 %a) {
9 %t1 = bitcast i64 %a to <2 x i32>
10 %t2 = bitcast i64 %a to <2 x i32>
23 %tmp28 = bitcast <2 x float> %A to i64 ; <i64> [#uses=2]
24 %tmp23 = trunc i64 %tmp28 to i32 ; <i32> [#uses=1]
27 %tmp = bitcast <2 x i32> %B to i64
28 %tmp2 = trunc i64 %tmp to i32 ; <i32> [#uses=1]
45 define float @test3(<2 x float> %A, <2 x i64> %B)
[all...] |
| phi-merge-gep.ll | 8 define void @foo(float* %Ar, float* %Ai, i64 %As, float* %Cr, float* %Ci, i64 %Cs, i64 %n) nounwind {
10 %0 = getelementptr inbounds float* %Ar, i64 0 ; <float*> [#uses=1]
11 %1 = getelementptr inbounds float* %Ai, i64 0 ; <float*> [#uses=1]
12 %2 = mul i64 %n, %As ; <i64> [#uses=1]
13 %3 = getelementptr inbounds float* %Ar, i64 %2 ; <float*> [#uses=1]
14 %4 = mul i64 %n, %As ; <i64> [#uses=1
[all...] |
| /external/llvm/test/Transforms/LoopStrengthReduce/ |
| quadradic-exit-value.ll | 5 define i64 @foo(i64 %n) {
10 %indvar = phi i64 [ 0, %entry ], [ %indvar.next, %loop ]
11 %indvar.next = add i64 %indvar, 1
12 %c = icmp eq i64 %indvar.next, %n
16 %r = mul i64 %indvar.next, %indvar.next
17 ret i64 %r
|
| /external/llvm/test/Transforms/IndVarSimplify/ |
| preserve-gep-nested.ll | 17 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n32:64"
23 define void @foo(%struct.Q* %s, i64 %n) nounwind {
28 %i = phi i64 [ 2, %entry ], [ %i.next, %bb ]
29 %j = phi i64 [ 0, %entry ], [ %j.next, %bb ]
30 %t5 = icmp slt i64 %i, %n
34 %t0 = getelementptr inbounds %struct.Q* %s, i64 0, i32 0, i64 0, i32 0, i32 0, i64 %i
37 %t3 = getelementptr inbounds %struct.Q* %s, i64 0, i32 0, i64 0, i32 0, i32 0, i64 %
[all...] |
| 2008-10-03-CouldNotCompute.ll | 12 %1 = sext i32 %0 to i64 ; <i64> [#uses=1]
17 %val.02 = phi i64 [ %5, %bb ], [ 0, %bb.nph ] ; <i64> [#uses=2]
18 %result.01 = phi i64 [ %4, %bb ], [ 0, %bb.nph ] ; <i64> [#uses=1]
20 %3 = mul i64 %1, %val.02 ; <i64> [#uses=1]
21 %4 = add i64 %3, %result.01 ; <i64> [#uses=2
[all...] |
| /external/llvm/test/Analysis/LoopDependenceAnalysis/ |
| ziv.ll | 12 %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ]
13 %x = load i32* getelementptr ([256 x i32]* @x, i32 0, i64 6)
14 store i32 %x, i32* getelementptr ([256 x i32]* @x, i32 0, i64 5)
16 %i.next = add i64 %i, 1
17 %exitcond = icmp eq i64 %i.next, 256
26 define void @f2(i64 %c0) nounwind {
28 %c1 = add i64 %c0, 1
29 %x.ld.addr = getelementptr [256 x i32]* @x, i64 0, i64 %c0
30 %x.st.addr = getelementptr [256 x i32]* @x, i64 0, i64 %c
[all...] |
| siv-weak-crossing.ll | 14 %i = phi i64 [ 0, %entry ], [ %i.next, %for.body ]
15 %i.255 = sub i64 255, %i
16 %y.ld.addr = getelementptr [256 x i32]* @y, i64 0, i64 %i
17 %x.ld.addr = getelementptr [256 x i32]* @x, i64 0, i64 %i.255
18 %x.st.addr = getelementptr [256 x i32]* @x, i64 0, i64 %i
25 %i.next = add i64 %i, 1
26 %exitcond = icmp eq i64 %i.next, 25
[all...] |
| /external/llvm/test/CodeGen/PowerPC/ |
| 2008-02-05-LiveIntervalsAssert.ll | 7 %struct.JvmtiEventEnabled = type { i64 }
14 define void @_ZN23JNI_ArgumentPusherArray7iterateEy(%struct.JNI_ArgumentPusherArray* %this, i64 %fingerprint) nounwind {
46 %fingerprint_addr.0.reg2mem.9 = phi i64 [ 0, %entry ], [ 0, %bb52 ], [ 0, %bb82 ], [ 0, %bb93 ], [ %tmp118, %bb113 ] ; <i64> [#uses=1]
48 %tmp118 = lshr i64 %fingerprint_addr.0.reg2mem.9, 4 ; <i64> [#uses=2]
49 %tmp21158 = and i64 %tmp118, 15 ; <i64> [#uses=1]
50 switch i64 %tmp21158, label %bb113 [
51 i64 1, label %bb22.preheade
[all...] |
| 2008-09-12-CoalescerBug.ll | 18 %2 = bitcast [2 x %struct.vv_t]* null to i64* ; <i64*> [#uses=6]
19 %3 = getelementptr [2 x i64]* null, i32 0, i32 1 ; <i64*> [#uses=6]
20 %4 = bitcast %struct.vv_t* null to i64* ; <i64*> [#uses=5]
21 %5 = getelementptr [2 x i64]* null, i32 0, i32 1 ; <i64*> [#uses=3]
25 %6 = or i64 0, 0 ; <i64> [#uses=2
[all...] |
| /external/llvm/test/Analysis/ScalarEvolution/ |
| sext-iv-1.ll | 2 ; RUN: | grep { --> (sext i. \{.\*,+,.\*\}<%bb1> to i64)} | count 5
7 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
15 %i.0.reg2mem.0 = phi i64 [ -128, %bb1.thread ], [ %8, %bb1 ] ; <i64> [#uses=3]
16 %0 = trunc i64 %i.0.reg2mem.0 to i7 ; <i8> [#uses=1]
17 %1 = trunc i64 %i.0.reg2mem.0 to i9 ; <i8> [#uses=1]
18 %2 = sext i9 %1 to i64 ; <i64> [#uses=1]
19 %3 = getelementptr double* %x, i64 %2 ; <double*> [#uses=1]
22 %6 = sext i7 %0 to i64 ; <i64> [#uses=1
[all...] |
