| /external/llvm/test/Transforms/InstCombine/ |
| bitcast-vector-fold.ll | 2 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
5 define <2 x i64> @test1() {
6 %tmp3 = bitcast <4 x i32> < i32 0, i32 1, i32 2, i32 3 > to <2 x i64>
7 ret <2 x i64> %tmp3
11 %tmp3 = bitcast <2 x i64> < i64 0, i64 1 > to <4 x i32>
21 %tmp3 = bitcast <2 x i64> < i64 0, i64 1 > to <4 x float
[all...] |
| align-addr.ll | 2 target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
10 define void @test0(i8* %b, i64 %n, i64 %u, i64 %y) nounwind {
12 %c = ptrtoint i8* %b to i64
13 %d = and i64 %c, -16
14 %e = inttoptr i64 %d to double*
15 %v = mul i64 %u, 2
16 %z = and i64 %y, -2
17 %t1421 = icmp eq i64 %n,
[all...] |
| /external/llvm/test/CodeGen/X86/ |
| lsr-delayed-fold.ll | 7 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
10 define fastcc void @formatValue(i64 %arg5) nounwind {
12 %t = trunc i64 %arg5 to i32 ; <i32> [#uses=1]
13 %t13 = sub i64 0, %arg5 ; <i64> [#uses=1]
14 %t14 = and i64 %t13, 4294967295 ; <i64> [#uses=1]
18 %t16 = phi i64 [ 0, %bb12 ], [ %t23, %bb15 ] ; <i64> [#uses=2]
19 %t17 = mul i64 %t14, %t16 ; <i64> [#uses=1
[all...] |
| 2007-04-25-MMX-PADDQ.ll | 4 define <1 x i64> @unsigned_add3(<1 x i64>* %a, <1 x i64>* %b, i32 %count) nounwind {
15 %sum.035.0 = phi <1 x i64> [ zeroinitializer, %entry ], [ %tmp22, %bb26 ] ; <<1 x i64>> [#uses=1]
16 %tmp13 = getelementptr <1 x i64>* %b, i32 %i.037.0 ; <<1 x i64>*> [#uses=1]
17 %tmp14 = load <1 x i64>* %tmp13 ; <<1 x i64>> [#uses=1]
18 %tmp18 = getelementptr <1 x i64>* %a, i32 %i.037.0 ; <<1 x i64>*> [#uses=1
[all...] |
| optimize-max-2.ll | 8 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
10 define void @foo(double* nocapture %p, i64 %x, i64 %y) nounwind {
12 %tmp = icmp eq i64 %y, 0 ; <i1> [#uses=1]
13 %umax = select i1 %tmp, i64 1, i64 %y ; <i64> [#uses=2]
14 %tmp8 = icmp ugt i64 %umax, %x ; <i1> [#uses=1]
15 %umax9 = select i1 %tmp8, i64 %umax, i64 %x ; <i64> [#uses=1
[all...] |
| dbg-large-unsigned-const.ll | 3 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128-n8:16:32"
6 define zeroext i1 @_Z3iseRKxS0_(i64* nocapture %LHS, i64* nocapture %RHS) nounwind readonly optsize ssp {
8 tail call void @llvm.dbg.value(metadata !{i64* %LHS}, i64 0, metadata !7), !dbg !13
9 tail call void @llvm.dbg.value(metadata !{i64* %RHS}, i64 0, metadata !11), !dbg !14
10 %tmp1 = load i64* %LHS, align 4, !dbg !15, !tbaa !17
11 %tmp3 = load i64* %RHS, align 4, !dbg !15, !tbaa !17
12 %cmp = icmp eq i64 %tmp1, %tmp3, !dbg !1
[all...] |
| lsr-reuse.ll | 20 define void @full_me_0(double* nocapture %A, double* nocapture %B, double* nocapture %C, i64 %n) nounwind {
22 %t0 = icmp sgt i64 %n, 0
26 %i = phi i64 [ %i.next, %loop ], [ 0, %entry ]
27 %Ai = getelementptr inbounds double* %A, i64 %i
28 %Bi = getelementptr inbounds double* %B, i64 %i
29 %Ci = getelementptr inbounds double* %C, i64 %i
34 %i.next = add nsw i64 %i, 1
35 %exitcond = icmp eq i64 %i.next, %n
65 define void @mostly_full_me_0(double* nocapture %A, double* nocapture %B, double* nocapture %C, i64 %n) nounwind {
67 %t0 = icmp sgt i64 %n,
[all...] |
| 2009-06-05-VariableIndexInsert.ll | 3 define <2 x i64> @_mm_insert_epi16(<2 x i64> %a, i32 %b, i32 %imm) nounwind readnone {
5 %conv = bitcast <2 x i64> %a to <8 x i16> ; <<8 x i16>> [#uses=1]
9 %conv6 = bitcast <8 x i16> %vecins to <2 x i64> ; <<2 x i64>> [#uses=1]
10 ret <2 x i64> %conv6
|
| 2010-01-18-DbgValue.ll | 35 !4 = metadata !{i32 524309, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !5, i32 0, null} ; [ DW_TAG_subroutine_type ]
37 !6 = metadata !{i32 524324, metadata !2, metadata !"double", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ]
38 !7 = metadata !{i32 524307, metadata !2, metadata !"Rect", metadata !2, i32 6, i64 256, i64 64, i64 0, i32 0, null, metadata !8, i32 0, null} ; [ DW_TAG_structure_type ]
40 !9 = metadata !{i32 524301, metadata !7, metadata !"P1", metadata !2, i32 7, i64 128, i64 64, i64 0, i32 0, metadata !10} ; [ DW_TAG_member
[all...] |
| 2010-04-21-CoalescerBug.ll | 4 %struct.CMTime = type <{ i64, i32, i32, i64 }>
11 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %agg.result1, i8* null, i64 96, i32 4, i1 false)
15 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
|
| 2011-07-13-BadFrameIndexDisplacement.ll | 8 define i32 @f(i64 %a, i64 %b) nounwind readnone {
12 %tmp6 = add i64 %a, -2147483647
13 %.sum = add i64 %tmp6, %b
14 %tmp8 = getelementptr inbounds [39 x i8]* %stack_main, i64 0, i64 %.sum
|
| avx-select.ll | 16 define <4 x i64> @select01(i32 %a, <4 x i64> %b) nounwind {
18 %selres = select i1 %cmpres, <4 x i64> zeroinitializer, <4 x i64> %b
19 %res = xor <4 x i64> %b, %selres
20 ret <4 x i64> %res
|
| bitcast.ll | 5 define i64 @test1(double %t) {
6 %u = bitcast double %t to i64 ; <i64> [#uses=1]
7 ret i64 %u
10 define double @test2(i64 %t) {
11 %u = bitcast i64 %t to double ; <double> [#uses=1]
|
| br-fold.ll | 11 br i1 icmp eq (i64 or (i64 ptrtoint ([33 x i16]* @_ZN11xercesc_2_513SchemaSymbols21fgURI_SCHEMAFORSCHEMAE to i64),
12 i64 ptrtoint ([9 x i16]* @_ZN11xercesc_2_56XMLUni16fgNotationStringE to i64)), i64 0),
|
| byval.ll | 10 %struct.s = type { i64, i64, i64 }
12 define i64 @f(%struct.s* byval %a) {
15 %tmp3 = load i64* %tmp2, align 8
16 ret i64 %tmp3
|
| dbg-byval-parameter.ll | 32 !4 = metadata !{i32 524309, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !5, i32 0, null} ; [ DW_TAG_subroutine_type ]
34 !6 = metadata !{i32 524324, metadata !2, metadata !"double", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ]
35 !7 = metadata !{i32 524307, metadata !2, metadata !"Rect", metadata !2, i32 6, i64 256, i64 64, i64 0, i32 0, null, metadata !8, i32 0, null} ; [ DW_TAG_structure_type ]
37 !9 = metadata !{i32 524301, metadata !7, metadata !"P1", metadata !2, i32 7, i64 128, i64 64, i64 0, i32 0, metadata !10} ; [ DW_TAG_member
[all...] |
| inline-asm-flag-clobber.ll | 4 define i64 @t(i64* %arg) nounwind {
8 %2 = icmp eq i64* null, %arg ; <i1> [#uses=1]
9 %3 = tail call i64* asm sideeffect "movl %fs:0,$0", "=r,~{dirflag},~{fpsr},~{flags}"() nounwind ; <%struct.thread*> [#uses=0]
15 ret i64 1
18 ret i64 0
|
| mmx-copy-gprs.ll | 12 define void @foo(<1 x i64>* %x, <1 x i64>* %y) nounwind {
14 %tmp1 = load <1 x i64>* %y, align 8 ; <<1 x i64>> [#uses=1]
15 store <1 x i64> %tmp1, <1 x i64>* %x, align 8
|
| peep-test-0.ll | 5 define void @loop(i64 %n, double* nocapture %d) nounwind {
10 %indvar = phi i64 [ %n, %entry ], [ %indvar.next, %bb ]
11 %i.03 = add i64 %indvar, %n
12 %0 = getelementptr double* %d, i64 %i.03
16 %indvar.next = add i64 %indvar, 1
17 %exitcond = icmp eq i64 %indvar.next, 0
|
| shift-and.ll | 20 define i64 @t3(i64 %t, i64 %val) nounwind {
21 %shamt = and i64 %t, 63
22 %res = lshr i64 %val, %shamt
23 ret i64 %res
|
| /external/llvm/test/Transforms/MemCpyOpt/ |
| memmove.ll | 4 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
7 declare void @llvm.memmove.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
14 %malloccall = tail call i8* @malloc(i32 trunc (i64 mul nuw (i64 ptrtoint (i8* getelementptr (i8* null, i32 1) to i64), i64 13) to i32))
16 %call3.sub = getelementptr inbounds [13 x i8]* %call3, i64 0, i64 0
17 tail call void @llvm.memmove.p0i8.p0i8.i64(i8* %call3.sub, i8* %src, i64 13, i32 1, i1 false
[all...] |
| /external/llvm/test/CodeGen/Generic/ |
| 2006-09-02-LocalAllocCrash.ll | 3 %struct.CHESS_POSITION = type { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i32, i32, i8, i8, [64 x i8], i8, i8, i8, i8, i8
[all...] |
| /external/llvm/test/Analysis/BasicAA/ |
| 2003-06-01-AliasCrash.ll | 4 %tmp.961 = getelementptr [3 x i32]* %a.1, i64 0, i64 4
6 %tmp.119 = getelementptr [3 x i32]* %a.1, i64 1, i64 0
8 %tmp.1541 = getelementptr [3 x i32]* %a.1, i64 0, i64 4
|
| /external/llvm/test/CodeGen/ARM/ |
| 2009-03-09-AddrModeBug.ll | 7 define fastcc %struct.node_t* @_ZL6createP6node_tii3v_tS1_d(%struct.node_t* %n, i32 %lvl, i32 %dist, i64 %c.0.0, i64 %c.0.1, i64 %c.0.2, i64 %d.0.0, i64 %d.0.1, i64 %d.0.2, double %r) nounwind {
|
| /external/llvm/test/CodeGen/SystemZ/ |
| 11-BSwap.ll | 4 target datalayout = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16"
20 define zeroext i64 @foo3(i64 %a) {
23 %res = tail call i64 @llvm.bswap.i64(i64 %a)
24 ret i64 %res
41 define i64 @foo6(i64* %b) {
44 %a = load i64* %
[all...] |
