| /external/llvm/test/Transforms/InstCombine/ |
| 2007-04-08-SingleEltVectorCrash.ll | 4 define i64 @bork(<1 x i64> %vec) {
5 %tmp = extractelement <1 x i64> %vec, i32 0
6 ret i64 %tmp
|
| 2009-01-31-InfIterate.ll | 3 define i128 @test(i64 %A, i64 %B, i1 %C, i128 %Z, i128 %Y, i64* %P, i64* %Q) {
5 %tmp2 = trunc i128 %Z to i64
6 %tmp4 = trunc i128 %Y to i64
7 store i64 %tmp2, i64* %P
8 store i64 %tmp4, i64* %
[all...] |
| 2003-05-26-CastMiscompile.ll | 3 define i64 @test(i64 %Val) {
4 %tmp.3 = trunc i64 %Val to i32 ; <i32> [#uses=1]
5 %tmp.8 = zext i32 %tmp.3 to i64 ; <i64> [#uses=1]
6 ret i64 %tmp.8
|
| /external/qemu/target-arm/ |
| helper.h | 50 DEF_HELPER_1(logicq_cc, i32, i64)
117 DEF_HELPER_3(vfp_toshd, i64, f64, i32, ptr)
118 DEF_HELPER_3(vfp_tosld, i64, f64, i32, ptr)
119 DEF_HELPER_3(vfp_touhd, i64, f64, i32, ptr)
120 DEF_HELPER_3(vfp_tould, i64, f64, i32, ptr)
125 DEF_HELPER_3(vfp_shtod, f64, i64, i32, ptr)
126 DEF_HELPER_3(vfp_sltod, f64, i64, i32, ptr)
127 DEF_HELPER_3(vfp_uhtod, f64, i64, i32, ptr)
128 DEF_HELPER_3(vfp_ultod, f64, i64, i32, ptr)
169 DEF_HELPER_2(neon_qadd_u64, i64, i64, i64
[all...] |
| /external/llvm/test/ExecutionEngine/ |
| 2003-05-06-LivenessClobber.ll | 6 @test = global i64 0 ; <i64*> [#uses=1]
8 define internal i64 @test.upgrd.1() {
9 %tmp.0 = load i64* @test ; <i64> [#uses=1]
10 %tmp.1 = add i64 %tmp.0, 1 ; <i64> [#uses=1]
11 ret i64 %tmp.1
15 %L = call i64 @test.upgrd.1( ) ; <i64> [#uses=1
[all...] |
| /external/llvm/test/CodeGen/Alpha/ |
| bic.ll | 4 define i64 @bar(i64 %x, i64 %y) {
6 %tmp.1 = xor i64 %x, -1 ; <i64> [#uses=1]
7 %tmp.2 = and i64 %y, %tmp.1 ; <i64> [#uses=1]
8 ret i64 %tmp.2
|
| eqv.ll | 4 define i64 @bar(i64 %x, i64 %y) {
6 %tmp.1 = xor i64 %x, -1 ; <i64> [#uses=1]
7 %tmp.2 = xor i64 %y, %tmp.1 ; <i64> [#uses=1]
8 ret i64 %tmp.2
|
| ornot.ll | 4 define i64 @bar(i64 %x, i64 %y) {
6 %tmp.1 = xor i64 %x, -1 ; <i64> [#uses=1]
7 %tmp.2 = or i64 %y, %tmp.1 ; <i64> [#uses=1]
8 ret i64 %tmp.2
|
| /external/llvm/test/CodeGen/X86/ |
| 2006-10-09-CycleInDAG.ll | 5 %tmp201.upgrd.1 = sext i32 %tmp201 to i64 ; <i64> [#uses=1]
6 %tmp202 = load i64* null ; <i64> [#uses=1]
7 %tmp203 = add i64 %tmp201.upgrd.1, %tmp202 ; <i64> [#uses=1]
8 store i64 %tmp203, i64* null
|
| 2008-02-05-ISelCrash.ll | 4 @nodes = external global i64 ; <i64*> [#uses=2]
8 %tmp1 = load i64* @nodes, align 8 ; <i64> [#uses=1]
9 %tmp2 = add i64 %tmp1, 1 ; <i64> [#uses=1]
10 store i64 %tmp2, i64* @nodes, align 8
|
| 2009-06-06-ConcatVectors.ll | 3 define <2 x i64> @_mm_movpi64_pi64(<1 x i64> %a, <1 x i64> %b) nounwind readnone {
5 %0 = shufflevector <1 x i64> %a, <1 x i64> %b, <2 x i32> <i32 0, i32 1>
6 ret <2 x i64> %0
|
| inline-asm-tied.ll | 5 @llvm.used = appending global [1 x i8*] [i8* bitcast (i64 (i64)* @_OSSwapInt64 to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
7 define i64 @_OSSwapInt64(i64 %_data) nounwind {
9 %retval = alloca i64 ; <i64*> [#uses=2]
10 %_data.addr = alloca i64 ; <i64*> [#uses=4]
11 store i64 %_data, i64* %_data.add
[all...] |
| sse-align-6.ll | 3 define <2 x i64> @bar(<2 x i64>* %p, <2 x i64> %x) nounwind {
4 %t = load <2 x i64>* %p, align 8
5 %z = mul <2 x i64> %t, %x
6 ret <2 x i64> %z
|
| subreg-to-reg-3.ll | 5 define i64 @foo(i64 %a) {
6 %b = mul i64 %a, 7823
7 %c = and i64 %b, 4294967295
8 %d = add i64 %c, 1
9 ret i64 %d
|
| vec_add.ll | 3 define <2 x i64> @test(<2 x i64> %a, <2 x i64> %b) {
5 %tmp9 = add <2 x i64> %b, %a ; <<2 x i64>> [#uses=1]
6 ret <2 x i64> %tmp9
|
| vec_insert-3.ll | 3 define <2 x i64> @t1(i64 %s, <2 x i64> %tmp) nounwind {
4 %tmp1 = insertelement <2 x i64> %tmp, i64 %s, i32 1
5 ret <2 x i64> %tmp1
|
| vec_shuffle-15.ll | 3 define <2 x i64> @t00(<2 x i64> %a, <2 x i64> %b) nounwind {
4 %tmp = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> < i32 0, i32 0 >
5 ret <2 x i64> %tmp
8 define <2 x i64> @t01(<2 x i64> %a, <2 x i64> %b) nounwind {
9 %tmp = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> < i32 0, i32 1
[all...] |
| vshift_split.ll | 4 define <2 x i64> @update(<2 x i64> %val) nounwind readnone {
6 %shr = lshr <2 x i64> %val, < i64 2, i64 3 >
7 ret <2 x i64> %shr
|
| /external/llvm/test/CodeGen/Mips/ |
| mips64instrs.ll | 3 define i64 @f0(i64 %a0, i64 %a1) nounwind readnone {
6 %add = add nsw i64 %a1, %a0
7 ret i64 %add
10 define i64 @f1(i64 %a0, i64 %a1) nounwind readnone {
13 %sub = sub nsw i64 %a0, %a1
14 ret i64 %su
[all...] |
| madd-msub.ll | 4 define i64 @madd1(i32 %a, i32 %b, i32 %c) nounwind readnone {
6 %conv = sext i32 %a to i64
7 %conv2 = sext i32 %b to i64
8 %mul = mul nsw i64 %conv2, %conv
9 %conv4 = sext i32 %c to i64
10 %add = add nsw i64 %mul, %conv4
11 ret i64 %add
15 define i64 @madd2(i32 %a, i32 %b, i32 %c) nounwind readnone {
17 %conv = zext i32 %a to i64
18 %conv2 = zext i32 %b to i64
[all...] |
| /external/llvm/test/CodeGen/Generic/ |
| 2005-12-12-ExpandSextInreg.ll | 3 define i64 @test(i64 %A) {
4 %B = trunc i64 %A to i8 ; <i8> [#uses=1]
5 %C = sext i8 %B to i64 ; <i64> [#uses=1]
6 ret i64 %C
|
| /external/llvm/test/CodeGen/Thumb2/ |
| thumb2-sub3.ll | 4 define i64 @f1(i64 %a) {
8 %tmp = sub i64 %a, 171
9 ret i64 %tmp
13 define i64 @f2(i64 %a) {
17 %tmp = sub i64 %a, 1179666
18 ret i64 %tmp
22 define i64 @f3(i64 %a)
[all...] |
| /external/llvm/test/Transforms/ConstProp/ |
| bitcast.ll | 4 define <1 x i64> @test1() {
5 %A = bitcast i64 63 to <1 x i64>
6 ret <1 x i64> %A
8 ; CHECK: ret <1 x i64> <i64 63>
|
| /external/llvm/test/Analysis/ScalarEvolution/ |
| xor-and.ll | 2 ; RUN: | grep {\\--> (zext i4 (-8 + (trunc i64 (8 \\* %x) to i4)) to i64)}
5 ; --> (zext i4 (-1 + (-1 * (trunc i64 (8 * %x) to i4))) to i64)
7 define i64 @foo(i64 %x) {
8 %a = shl i64 %x, 3
9 %t = and i64 %a, 8
10 %z = xor i64 %t, 8
11 ret i64 %
[all...] |
| /external/llvm/test/CodeGen/PowerPC/ |
| 2007-03-24-cntlzd.ll | 3 define i32 @_ZNK4llvm5APInt17countLeadingZerosEv(i64 *%t) nounwind {
4 %tmp19 = load i64* %t
5 %tmp22 = tail call i64 @llvm.ctlz.i64( i64 %tmp19 ) ; <i64> [#uses=1]
6 %tmp23 = trunc i64 %tmp22 to i32
12 declare i64 @llvm.ctlz.i64(i64)
[all...] |
