| /external/llvm/test/CodeGen/X86/ |
| fast-isel-x86-64.ll | 3 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
18 define void @test2(i64 %x) nounwind ssp {
20 %x.addr = alloca i64, align 8
21 store i64 %x, i64* %x.addr, align 8
22 %tmp = load i64* %x.addr, align 8
23 %cmp = icmp sgt i64 %tmp, 42
40 define i64 @test3() nounwind {
41 %A = ptrtoint i32* @G to i64
42 ret i64 %
[all...] |
| nosse-varargs.ll | 5 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128"
14 %0 = getelementptr [1 x %struct.__va_list_tag]* %ap, i64 0, i64 0, i32 0 ; <i32*> [#uses=2]
20 %3 = getelementptr [1 x %struct.__va_list_tag]* %ap, i64 0, i64 0, i32 3 ; <i8**> [#uses=1]
23 %6 = ptrtoint i8* %5 to i64 ; <i64> [#uses=1]
24 %ctg2 = getelementptr i8* %4, i64 %6 ; <i8*> [#uses=1]
30 %8 = getelementptr [1 x %struct.__va_list_tag]* %ap, i64 0, i64 0, i32 2 ; <i8**> [#uses=2
[all...] |
| dbg-value-isel.ll | 2 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
16 call void @llvm.dbg.value(metadata !{i32 addrspace(1)* %ip}, i64 0, metadata !8), !dbg !9
31 call void @llvm.dbg.value(metadata !{i32 %6}, i64 0, metadata !10), !dbg !12
46 call void @llvm.dbg.value(metadata !{i32 %13}, i64 0, metadata !13), !dbg !14
61 call void @llvm.dbg.value(metadata !{i32 %20}, i64 0, metadata !15), !dbg !16
79 declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
86 !3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ]
88 !5 = metadata !{i32 589839, metadata !2, metadata !"", null, i32 0, i64 32, i64 32, i64 0, i32 0, metadata !6} ; [ DW_TAG_pointer_type
[all...] |
| dbg-value-range.ll | 8 tail call void @llvm.dbg.value(metadata !{%struct.a* %b}, i64 0, metadata !6), !dbg !13
9 %tmp1 = getelementptr inbounds %struct.a* %b, i64 0, i32 0, !dbg !14
11 tail call void @llvm.dbg.value(metadata !{i32 %tmp2}, i64 0, metadata !11), !dbg !14
19 declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone
27 !3 = metadata !{i32 589845, metadata !1, metadata !"", metadata !1, i32 0, i64 0, i64 0, i32 0, i32 0, i32 0, metadata !4, i32 0, i32 0} ; [ DW_TAG_subroutine_type ]
29 !5 = metadata !{i32 589860, metadata !2, metadata !"int", null, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ]
31 !7 = metadata !{i32 589839, metadata !2, metadata !"", null, i32 0, i64 64, i64 64, i64 0, i32 0, metadata !8} ; [ DW_TAG_pointer_type
[all...] |
| 2006-08-16-CycleInDAG.ll | 6 %struct.u = type { [1 x i64] }
15 %gep.upgrd.1 = zext i32 %tmp11 to i64 ; <i64> [#uses=1]
16 %tmp17 = getelementptr %struct.expr** null, i64 %gep.upgrd.1 ; <%struct.expr**> [#uses=0]
|
| /external/llvm/test/Analysis/ScalarEvolution/ |
| sext-iv-2.ll | 10 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64"
33 %tmp5 = sext i32 %i.02 to i64 ; <i64> [#uses=1]
34 %tmp6 = sext i32 %j.01 to i64 ; <i64> [#uses=1]
35 %tmp7 = getelementptr [32 x [256 x i32]]* @table, i64 0, i64 %tmp5, i64 %tmp6 ; <i32*> [#uses=1]
59 %tmp12 = load i32* getelementptr ([32 x [256 x i32]]* @table, i64 0, i64 9, i64 132), align 16 ; <i32> [#uses=1
[all...] |
| trip-count3.ll | 8 %struct.FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct.FILE*, i32, i32, i64, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i64, i32, [20 x i8] }
29 declare i64 @fread(i8* noalias nocapture, i64, i64, %struct.FILE* noalias nocapture) nounwind
49 %1 = getelementptr %struct.SHA_INFO* %sha_info, i64 0, i32 3
51 call void @llvm.memcpy.p0i8.p0i8.i64(i8* %2, i8* %buffer_addr.0.i, i64 64, i32 1, i1 false)
52 %3 = getelementptr %struct.SHA_INFO* %sha_info, i64 0, i32 3, i64
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| 2011-04-26-SchedTweak.ll | 8 %struct.BD = type { %struct.BD*, i32, i32, i32, i32, i64, i32 (%struct.BD*, i8*, i64, i32)*, i32 (%struct.BD*, i8*, i32, i32)*, i32 (%struct.BD*, i8*, i64, i32)*, i32 (%struct.BD*, i8*, i32, i32)*, i32 (%struct.BD*, i64, i32)*, [16 x i8], i64, i64 }
48 %tmp10 = zext i32 %tmp6 to i64
49 %tmp11 = zext i32 %tmp5 to i64
50 %tmp12 = mul nsw i64 %tmp10, %tmp11
51 %tmp13 = call i32 @foo(i8* getelementptr inbounds ([6 x i8]* @.str1, i32 0, i32 0), i64 %tmp12, i32 %tmp5) nounwin
[all...] |
| 2009-10-21-InvalidFNeg.ll | 2 target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
13 define linkonce_odr arm_aapcs_vfpcc void @foo(%eee* noalias sret %agg.result, i64 %tfrm.0.0, i64 %tfrm.0.1, i64 %tfrm.0.2, i64 %tfrm.0.3, i64 %tfrm.0.4, i64 %tfrm.0.5, i64 %tfrm.0.6, i64 %tfrm.0.7) nounwind noinline {
15 %tmp104 = zext i64 %tfrm.0.2 to i512 ; <i512> [#uses=1
[all...] |
| arguments-nosplit-double.ll | 4 define i32 @f(i64 %z, i32 %a, double %b) {
|
| /external/llvm/test/Transforms/Mem2Reg/ |
| ConvertDebugInfo.ll | 11 ; CHECK: call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata !0)
12 ; CHECK: call void @llvm.dbg.value(metadata !{double %j}, i64 0, metadata !9)
37 !4 = metadata !{i32 524309, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !5, i32 0, null} ; [ DW_TAG_subroutine_type ]
39 !6 = metadata !{i32 524324, metadata !2, metadata !"double", metadata !2, i32 0, i64 64, i64 64, i64 0, i32 0, i32 4} ; [ DW_TAG_base_type ]
40 !7 = metadata !{i32 524324, metadata !2, metadata !"int", metadata !2, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type
[all...] |
| /external/llvm/test/CodeGen/CellSPU/ |
| select_bits.ll | 4 target datalayout = "E-p:32:32:128-f64:64:128-f32:32:128-i64:32:128-i32:32:128-i16:16:128-i8:8:128-i1:8:128-a0:0:128-v128:128:128-s0:128:128"
12 define <2 x i64> @selectbits_v2i64_01(<2 x i64> %rA, <2 x i64> %rB, <2 x i64> %rC) {
13 %C = and <2 x i64> %rC, %rB
14 %A = xor <2 x i64> %rC, < i64 -1, i64 -1 >
15 %B = and <2 x i64> %A, %r
[all...] |
| /external/llvm/test/Feature/ |
| recursivetype.ll | 47 %cast1004 = inttoptr i64 0 to %list* ; <%list*> [#uses=1]
56 %cast1005 = inttoptr i64 0 to %list* ; <%list*> [#uses=1]
65 %reg111.upgrd.1 = ptrtoint i8* %reg111 to i64 ; <i64> [#uses=1]
66 %reg1002 = add i64 %reg111.upgrd.1, 8 ; <i64> [#uses=1]
67 %reg1002.upgrd.2 = inttoptr i64 %reg1002 to i8* ; <i8*> [#uses=1]
70 %cast1003 = inttoptr i64 0 to i64* ; <i64*> [#uses=1
[all...] |
| /external/llvm/test/Transforms/DeadStoreElimination/ |
| simple.ll | 2 target datalayout = "E-p:64:64:64-a0:0:8-f32:32:32-f64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-v64:64:64-v128:128:128"
4 declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind
5 declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i32, i1) nounwind
66 call void @llvm.memset.p0i8.i64(i8* %q, i8 42, i64 900, i32 1, i1 false)
77 call void @llvm.memcpy.p0i8.p0i8.i64(i8* %q, i8* %r, i64 900, i32 1, i1 false)
185 tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* %P, i8* %Q, i64 12, i32 1, i1 false
[all...] |
| /external/llvm/test/Transforms/InstCombine/ |
| select.ll | 348 define i64 @test21(i32 %x) {
350 %retval = select i1 %tmp, i64 -1, i64 0
351 ret i64 %retval
355 ; CHECK-NEXT: ret i64
600 define i64 @test43(i32 %a) nounwind {
601 %a_ext = sext i32 %a to i64
603 %max = select i1 %is_a_nonnegative, i64 %a_ext, i64 0
604 ret i64 %ma
[all...] |
| /external/clang/test/CodeGen/ |
| x86_64-arguments-darwin.c | 4 // CHECK: declare void @func(i64, double)
|
| /external/clang/test/CodeGenCXX/ |
| new.cpp | 107 // CHECK: call void @llvm.memset.p0i8.i64(
111 // CHECK: {{call void.*llvm.memset.p0i8.i64.*i8 0, i64 %}}
115 // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64
146 // CHECK: {{call void.*llvm.memset.p0i8.i64.*i8 0, i64 %}}
160 // CHECK: call i8* @_ZN5AllocnaEm(i64 808)
161 // CHECK: store i64 200
189 // CHECK-NEXT: [[END:%.*]] = getelementptr inbounds [[A]]* [[BEGIN]], i64 5
193 // CHECK-NEXT: [[NEXT]] = getelementptr inbounds [[A]]* [[CUR]], i64
[all...] |
| /external/clang/test/CodeGenObjCXX/ |
| implicit-copy-assign-operator.mm | 48 // CHECK: {{call void @llvm.memcpy.p0i8.p0i8.i64.*i64 24}}
53 // CHECK: {{call void @llvm.memcpy.p0i8.p0i8.i64.*i64 12}}
|
| /external/expat/xmlwf/ |
| xmlfile.h | 10 #define XML_FMT_INT_MOD "I64"
|
| /external/llvm/test/Bitcode/ |
| sse42_crc32.ll | 21 ; CHECK: i64 @llvm.x86.sse42.crc32.64.8(
22 ; CHECK-NOT: i64 @llvm.x86.sse42.crc64.8(
25 ; CHECK: i64 @llvm.x86.sse42.crc32.64.64(
26 ; CHECK-NOT: i64 @llvm.x86.sse42.crc64.64(
|
| /external/llvm/test/CodeGen/Alpha/ |
| 2008-11-12-Add128.ll | 3 target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-f128:128:128"
9 %1 = load i64* null, align 8 ; <i64> [#uses=1]
10 %2 = zext i64 %1 to i128 ; <i128> [#uses=1]
|
| /external/llvm/test/CodeGen/Generic/ |
| 2002-04-14-UnexpectedUnsignedType.ll | 10 %cast225 = inttoptr i64 123456 to i8* ; <i8*> [#uses=1]
|
| /external/llvm/test/CodeGen/PowerPC/ |
| 2005-01-14-SetSelectCrash.ll | 4 %setle = icmp sle i64 1, 0 ; <i1> [#uses=1]
|
| hello.ll | 8 %tmp2 = tail call i32 @puts( i8* getelementptr ([13 x i8]* @.str, i32 0, i64 0) )
|
| itofp128.ll | 3 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f128:64:128"
10 %tmp2829 = fptoui ppc_fp128 %tmp15 to i64 ; <i64> [#uses=1]
11 %tmp282930 = zext i64 %tmp2829 to i128 ; <i128> [#uses=1]
|
