| /external/v8/src/x64/ |
| lithium-codegen-x64.h | 82 Operand ToOperand(LOperand* op) const;
274 // Emits code for pushing a constant operand.
275 void EmitPushConstantOperand(LOperand* operand);
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeTypes.cpp | 50 // node (CSE). An operand can change during analysis if the operand is a new
52 // value (as recorded in ReplacedValues) in which case the operand is turned
266 // Scan the operand list for the node, handling any nodes with operands that
377 // Otherwise, this node is new: this is the first operand of it that
383 // If the node only has a single operand, it is now ready.
418 // Check that all operand types are legal.
422 dbgs() << "Operand type " << i << " illegal!\n";
432 dbgs() << "Operand not processed?\n";
484 // Some previous operand changed. Add this one to the list
[all...] |
| /external/clang/lib/Parse/ |
| ParseExpr.cpp | 164 /// [C++] the third operand is an assignment-expression
349 // Also note that the third operand of the conditional operator is
414 /// id-expression that is the operand of address-of gets special treatment
432 /// id-expression that is the operand of address-of gets special treatment
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMAsmPrinter.cpp | 320 assert(0 && "<unknown operand type>");
404 // Does this asm operand have a single letter operand modifier?
418 case 'c': // Don't print "#" before an immediate operand.
454 // This takes advantage of the 2 operand-ness of ldm/stm and that we've
516 // Does this asm operand have a single letter operand modifier?
521 case 'A': // A memory operand for a VLD1/VST1 instruction.
523 case 'm': // The base register of a memory operand.
532 assert(MO.isReg() && "unexpected inline asm memory operand");
[all...] |
| /bionic/libc/regex/ |
| regerror.c | 66 { REG_BADRPT, "REG_BADRPT", "repetition-operator operand invalid" },
|
| /bionic/libm/man/ |
| hypot.3 | 117 Unlike the reserved operand fault on a
|
| /cts/tools/vm-tests/src/dot/junit/opcodes/opc_throw/ |
| Test_opc_throw.java | 149 * @title operand must be must be assignment-compatible
|
| /cts/tools/vm-tests-tf/src/dot/junit/opcodes/opc_throw/ |
| Test_opc_throw.java | 149 * @title operand must be must be assignment-compatible
|
| /development/tools/mkstubs/src/com/android/mkstubs/stubber/ |
| MethodStubber.java | 116 public void visitIntInsn(int opcode, int operand) {
|
| /external/javassist/src/main/javassist/convert/ |
| TransformCall.java | 60 * so that a different method is invoked. The class name in the operand
|
| /external/llvm/docs/HistoricalNotes/ |
| 2000-11-18-EarlyDesignIdeas.txt | 38 separate 3-operand instructions.
|
| /external/llvm/examples/OCaml-Kaleidoscope/Chapter7/ |
| codegen.ml | 29 | Ast.Unary (op, operand) ->
30 let operand = codegen_expr operand in
37 build_call callee [|operand|] "unop" builder
|
| /external/llvm/include/llvm/Analysis/ |
| ConstantsScanner.h | 28 unsigned OpIdx; // Operand index
|
| /external/llvm/include/llvm/ |
| IntrinsicsXCore.td | 93 // are ready then the operand passed to the intrinsic is returned.
|
| /external/llvm/include/llvm/MC/ |
| MCFixup.h | 61 /// determine how the operand value should be encoded into the instruction.
|
| MCSubtargetInfo.h | 35 const unsigned *OperandCycles; // Operand cycles
|
| /external/llvm/include/llvm/Transforms/Utils/ |
| ValueMapper.h | 48 /// operand is asked to be remapped which doesn't exist in the mapping.
|
| /external/llvm/lib/Support/ |
| regerror.c | 71 { REG_BADRPT, "REG_BADRPT", "repetition-operator operand invalid" },
|
| /external/llvm/lib/Target/MBlaze/InstPrinter/ |
| MBlazeInstPrinter.cpp | 43 assert(Op.isExpr() && "unknown operand kind in printOperand");
|
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeAsmPrinter.cpp | 199 // Print out an operand for an inline asm expression.
203 // Does this asm operand have a single letter operand modifier?
256 llvm_unreachable("<unknown operand type>");
|
| /external/llvm/lib/Target/Mips/ |
| MipsISelDAGToDAG.cpp | 147 // If the first operand is a FI, get the TargetFI Node
159 // Operand is a result from an ADD.
215 "(ADD|SUB)E flag operand must come from (ADD|SUB)C/E insn");
270 // Mips32 has a 32-bit three operand mul instruction.
|
| /external/llvm/lib/Target/PTX/ |
| PTXInstrInfo.h | 90 // Memory operand folding for spills
|
| PTXRegisterInfo.cpp | 51 "Instr does not have a FrameIndex operand!");
|
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.h | 38 RET_FLAG, // Return with a flag operand.
|
| /external/llvm/lib/Target/X86/Disassembler/ |
| X86DisassemblerDecoder.h | 484 /* state for additional bytes, consumed during operand decode. Pattern:
488 /* The VEX.vvvv field, which contains a third register operand for some AVX
510 /* A register or immediate operand encoded into the opcode */
518 depend on operand and address widths */
|
