| /external/llvm/utils/TableGen/ |
| X86ModRMFilters.h | 74 /// register or a memory operand.
129 /// @modRM - The value of the ModR/M byte when the register operand
|
| /external/v8/src/mips/ |
| regexp-macro-assembler-mips.h | 194 const Operand& rt);
201 const Operand& rt);
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| /external/v8/test/mjsunit/ |
| constant-folding.js | 37 x += x++; // ++ and -- apply ToNumber to their operand, even for postfix.
196 // We generate different code for the case where the operand is a constant.
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| /external/llvm/lib/CodeGen/ |
| TargetInstrInfoImpl.cpp | 119 /// operand indices that would swap value. Return true if the instruction
233 assert(FoldIdx<2 && "FoldIdx refers no nonexistent operand");
267 /// slot into the specified machine instruction for the specified operand(s).
269 /// operand folded, otherwise NULL is returned. The client is responsible for
289 // Add a memory operand, foldMemoryOperandImpl doesn't do that.
365 // Remat clients assume operand 0 is the defined register.
|
| RegAllocFast.cpp | 207 // Check that the use/def chain has exactly one operand - MO.
327 "Bad usePhysReg operand");
624 // setPhysReg - Change operand OpNum in MI the refer the PhysReg, considering
625 // subregs. This may invalidate any operand pointers.
626 // Return true if the operand kills its register.
647 // Handle special instruction operand like early clobbers and tied ops when
694 DEBUG(dbgs() << "Operand " << i << "("<< MO << ") is tied to operand "
699 // Note: we don't update the def operand yet. That would cause the normal
703 // Reload the register, but don't assign to the operand just yet
[all...] |
| MachineVerifier.cpp | 12 // Operand counts: All explicit operands must be present.
351 *OS << "- operand " << MONum << ": ";
606 // Don't check if it's the last operand in a variadic instruction. See,
611 report("Explicit operand marked as def", MO, MONum);
613 report("Explicit operand marked as implicit", MO, MONum);
618 report("Extra explicit operand on non-variadic instruction", MO, MONum);
795 report("PHI operand is not in the CFG", MO, MONum);
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.h | 50 RET_FLAG, // Return with a flag operand.
52 PIC_ADD, // Add with a PC operand and a PIC label.
317 /// Examine constraint string and operand type and determine a weight value.
318 /// The operand object must already have been set up with the operand type.
326 /// LowerAsmOperandForConstraint - Lower the specified operand into the Ops
|
| ARMExpandPseudoInsts.cpp | 92 // OddDblSpc depending on the lane number operand.
438 // Copy the am6offset operand.
443 // has an extra operand that is a use of the super-register. Record the
444 // operand index and skip over it.
453 // Copy the super-register source operand used for double-spaced subregs over
454 // to the new instruction as an implicit operand.
490 // Copy the am6offset operand.
533 // The lane operand is always the 3rd from last operand, before the 2
567 // Copy the am6offset operand
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsAsmPrinter.cpp | 285 // Print out an operand for an inline asm expression.
289 // Does this asm operand have a single letter operand modifier?
305 assert(MO.isReg() && "unexpected inline asm memory operand");
376 llvm_unreachable("<unknown operand type>");
405 // print the same way as all normal 3 operand instructions.
|
| /external/valgrind/main/VEX/priv/ |
| host_ppc_defs.h | 228 /* --------- Operand, which can be a reg or a u16/s16. --------- */
259 /* --------- Operand, which can be a reg or a u32/64. --------- */
285 /* --------- Operand, which can be a vector reg or a s6. --------- */
338 Bool /* is the 2nd operand an immediate? */);
351 Bool /* is the 2nd operand an immediate? */,
491 /* Destinations are on the LEFT (first operand) */
|
| host_x86_defs.h | 144 /* --------- Operand, which can be reg, immediate or memory. --------- */
179 /* --------- Operand, which can be reg or immediate only. --------- */
209 /* --------- Operand, which can be reg or memory only. --------- */
385 /* Destinations are on the RIGHT (second operand) */
508 /* X86 Floating point (fake 3-operand, "flat reg file" insns) */
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeIntegerTypes.cpp | 225 // Promote the integer operand by hand.
392 // If the result and operand types are the same after promotion, simplify
407 // Otherwise, just extend the original operand all the way to the larger type.
731 // Integer Operand Promotion
734 /// PromoteIntegerOperand - This method is called when the specified operand of
739 DEBUG(dbgs() << "Promote integer operand: "; N->dump(&DAG); dbgs() << "\n");
751 llvm_unreachable("Do not know how to promote this operator's operand!");
[all...] |
| LegalizeTypesGeneric.cpp | 55 // Convert the integer operand instead.
98 // Handle cases like i64 = BITCAST v1i64 on x86, where the operand
266 // Generic Operand Expansion.
307 "BUILD_VECTOR operand type doesn't match vector element type!");
377 "SCALAR_TO_VECTOR operand type doesn't match vector element type!");
|
| /external/llvm/lib/VMCore/ |
| Verifier.cpp | 132 /// dominance checks for the case when an instruction has an operand that is
380 Assert1(I.getOperand(i) != 0, "Operand is null", &I);
489 "Named metadata operand cannot be function local!", MD);
508 "Global metadata operand cannot be function local!", &MD, N);
512 Assert2(MD.isFunctionLocal(), "Invalid operand for global metadata!", &MD, Op);
802 "Function return type does not match operand "
827 "Indirectbr operand must have pointer type!", &BI);
[all...] |
| /external/clang/include/clang/AST/ |
| Stmt.h | [all...] |
| /external/webkit/Source/JavaScriptCore/assembler/ |
| X86Assembler.h | [all...] |
| MacroAssemblerX86Common.h | 62 // These conditions will only evaluate to true if the comparison is ordered - i.e. neither operand is NaN.
69 // If either operand is NaN, these conditions always evaluate to true.
85 // Operations are typically two operand - operation(source, srcDst)
86 // For many operations the source may be an TrustedImm32, the srcDst operand
425 // operand objects to loads and store will be implicitly constructed if a
793 // jz and jnz test whether the first operand is equal to zero, and take
794 // an optional second operand of a mask under which to perform the test.
[all...] |
| /external/llvm/examples/Kaleidoscope/Chapter6/ |
| toy.cpp | 130 ExprAST *Operand;
132 UnaryExprAST(char opcode, ExprAST *operand)
133 : Opcode(opcode), Operand(operand) {}
397 if (ExprAST *Operand = ParseUnary())
398 return new UnaryExprAST(Opc, Operand);
559 Value *OperandV = Operand->Codegen();
|
| /external/mesa3d/src/glsl/ |
| ir_reader.cpp | 722 "<operand> [<operand>])");
747 ir_read_error(st, list, "expected (expression <type> %s <operand> "
748 " <operand>)", op_sym->value());
753 ir_read_error(st, list, "expected (expression <type> %s <operand>)",
762 ir_read_error(st, NULL, "when reading first operand of %s",
772 ir_read_error(st, NULL, "when reading second operand of %s",
[all...] |
| /external/llvm/include/llvm/Target/ |
| TargetLowering.h | 164 /// the condition operand of SELECT and BRCOND nodes. In the case of
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.td | 269 // PowerPC Operand Definitions.
271 def s5imm : Operand<i32> {
274 def u5imm : Operand<i32> {
277 def u6imm : Operand<i32> {
280 def s16imm : Operand<i32> {
283 def u16imm : Operand<i32> {
286 def s16immX4 : Operand<i32> { // Multiply imm by 4 before printing.
289 def directbrtarget : Operand<OtherVT> {
293 def condbrtarget : Operand<OtherVT> {
297 def calltarget : Operand<iPTR>
[all...] |
| /external/valgrind/main/VEX/pub/ |
| libvex_ir.h | 632 range of its operand. Hence the partialness. */
729 element in the operand vector, and places the results in the destination
739 square root of each element in the operand vector. */
769 less elements than operand, but they are two times wider.
[all...] |
| /external/llvm/include/llvm/ |
| Instructions.h | 791 return 0U; // get index for modifying correct operand
798 /// getPointerOperandType - Method to return the pointer operand as a
814 /// zeros. If so, the result pointer and the first operand have the same
819 /// constant integers. If so, the result pointer and the first operand have
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| AsmPrinter.h | 414 /// that is independent of the operand, and may be independent of the instr
422 /// PrintAsmOperand - Print the specified operand of MI, an INLINEASM
425 /// the operand is erroneous.
430 /// PrintAsmMemoryOperand - Print the specified operand of MI, an INLINEASM
433 /// return true if the operand is erroneous.
|
| /frameworks/base/tools/layoutlib/create/src/com/android/tools/layoutlib/create/ |
| AsmAnalyzer.java | 559 // pass -- a zero operand instruction
562 public void visitIntInsn(int opcode, int operand) {
563 // pass -- a single int operand instruction
638 // type is the operand of the instruction to be visited. This operand must be the
|
