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  /external/llvm/lib/Target/X86/
X86InstrFormats.td 21 def Pseudo : Format<0>; def RawFrm : Format<1>;
135 // If this is a pseudo instruction, mark it isCodeGenOnly.
136 let isCodeGenOnly = !eq(!cast<string>(f), "Pseudo");
184 : X86Inst<0, Pseudo, NoImm, oops, iops, ""> {
238 // FpI_ - Floating Point Pseudo Instruction template. Not Predicated.
240 : X86Inst<0, Pseudo, NoImm, outs, ins, ""> {
  /external/wpa_supplicant/
sha1.c 111 * sha1_prf - SHA1-based Pseudo-Random Function (PRF) (IEEE 802.11i, 8.5.1.1)
117 * @buf: Buffer for the generated pseudo-random key
161 * sha1_t_prf - EAP-FAST Pseudo-Random Function (T-PRF)
167 * @buf: Buffer for the generated pseudo-random key
216 * tls_prf - Pseudo-Random Function for TLS (TLS-PRF, RFC 2246)
222 * @out: Buffer for the generated pseudo-random key
  /external/wpa_supplicant_6/wpa_supplicant/src/crypto/
sha1.c 111 * sha1_prf - SHA1-based Pseudo-Random Function (PRF) (IEEE 802.11i, 8.5.1.1)
117 * @buf: Buffer for the generated pseudo-random key
160 * sha1_t_prf - EAP-FAST Pseudo-Random Function (T-PRF)
166 * @buf: Buffer for the generated pseudo-random key
216 * tls_prf - Pseudo-Random Function for TLS (TLS-PRF, RFC 2246)
222 * @out: Buffer for the generated pseudo-random key
  /prebuilt/sdk/tools/linux/
llvm-rs-cc 
  /external/llvm/include/llvm/Target/
Target.td 206 // with pseudo-registers that are larger than the architectural registers.
219 // The generated pseudo-registers inherit super-classes and fields from their
330 bit usesCustomInserter = 0; // Pseudo instr needing special help.
337 bit isPseudo = 0; // Is this instruction a pseudo-instruction?
352 // encoding), or is it a pseudo instruction used for codegen modeling
357 // pseudo-instructions that are lowered to real instructions prior to
370 // Is this instruction a pseudo instruction for use by the assembler parser.
395 /// PseudoInstExpansion - Expansion information for a pseudo-instruction.
397 /// pseudo.
595 // Standard Pseudo Instructions
    [all...]
  /external/llvm/lib/Target/ARM/
ARMExpandPseudoInsts.cpp 1 //===-- ARMExpandPseudoInsts.cpp - Expand pseudo instructions -----*- C++ -*-=//
10 // This file contains a pass that expands pseudo instructions into target
17 #define DEBUG_TYPE "arm-pseudo"
34 VerifyARMPseudo("verify-arm-pseudo-expand", cl::Hidden,
51 return "ARM pseudo instruction expansion pass";
71 /// TransferImpOps - Transfer implicit operands on the pseudo instruction to
90 // For quad-register load-lane and store-lane pseudo instructors, the
359 /// load or store pseudo instruction.
406 /// ExpandVLD - Translate VLD pseudo instructions with Q, QQ or QQQQ register
442 // For an instruction writing double-spaced subregs, the pseudo instructio
    [all...]
  /external/clang/include/clang/AST/
ExprCXX.h     [all...]
  /external/webkit/Source/WebCore/css/
CSSSelector.cpp 65 // FIXME: Pseudo-elements and pseudo-classes do not have the same specificity. This function
315 // Paged Media pseudo-classes
432 bool element = false; // pseudo-element
434 bool isPagePseudoClass = false; // Page pseudo-class
  /prebuilt/linux-x86/toolchain/arm-eabi-4.4.0/lib/gcc/arm-eabi/4.4.0/plugin/include/
function.h 80 /* Indexed by pseudo register number, if nonzero gives the known alignment
81 for that pseudo (if REG_POINTER is set in x_regno_reg_rtx).
87 /* Indexed by pseudo register number, gives the rtx for that pseudo.
236 /* The arg pointer hard register, or the pseudo into which it was copied. */
  /prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/lib/gcc/arm-eabi/4.4.3/plugin/include/
function.h 80 /* Indexed by pseudo register number, if nonzero gives the known alignment
81 for that pseudo (if REG_POINTER is set in x_regno_reg_rtx).
87 /* Indexed by pseudo register number, gives the rtx for that pseudo.
236 /* The arg pointer hard register, or the pseudo into which it was copied. */
  /prebuilt/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/
function.h 80 /* Indexed by pseudo register number, if nonzero gives the known alignment
81 for that pseudo (if REG_POINTER is set in x_regno_reg_rtx).
87 /* Indexed by pseudo register number, gives the rtx for that pseudo.
236 /* The arg pointer hard register, or the pseudo into which it was copied. */
  /external/llvm/lib/Target/Mips/
MipsInstrFormats.td 31 def Pseudo : Format<0>;
69 // Mips Pseudo Instructions Format
71 MipsInst<outs, ins, asmstr, pattern, IIPseudo, Pseudo> {
MipsCodeEmitter.cpp 238 // Skip pseudo instructions.
239 if ((MI.getDesc().TSFlags & MipsII::FormMask) == MipsII::Pseudo)
  /prebuilt/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/
thread_db.h 63 /* Possible thread states. TD_THR_ANY_STATE is a pseudo-state used to
77 /* Thread type: user or system. TD_THR_ANY_TYPE is a pseudo-type used
157 TD_ALL_EVENTS, /* Pseudo-event number. */
stdlib.h 828 /* X/Open pseudo terminal handling. */
831 /* Return a master pseudo-terminal handle. */
836 /* The next four functions all take a master pseudo-tty fd and
846 /* Return the pathname of the pseudo terminal slave assoicated with
853 /* Store at most BUFLEN characters of the pathname of the slave pseudo
859 /* Open a master pseudo terminal and return its file descriptor. */
  /cts/tests/tests/telephony/src/android/telephony/cts/
TelephonyManagerTest.java 359 // pseudo-ESN.
373 assertFalse("ESN hex device id " + deviceId + " must not be a pseudo-ESN",
  /dalvik/dx/src/com/android/dx/ssa/
ConstCollector.java 131 // Insert a block containing the move-result-pseudo insn.
183 // Find defining instruction for move-result-pseudo instructions
  /external/libffi/
configure.ac 205 AC_CACHE_CHECK([assembler .cfi pseudo-op support],
234 AC_CACHE_CHECK([assembler .register pseudo-op support],
  /external/llvm/lib/CodeGen/SelectionDAG/
ScheduleDAGList.cpp 229 // If this is a pseudo-op node, we don't want to increment the current
231 if (FoundSUnit->Latency) // Don't increment CurCycle for pseudo-ops!
  /external/llvm/lib/Target/Blackfin/
README.txt 13 This is handled by creating a pseudo-register NCC that aliases CC. Register
122 Similarly for the subreg pseudo-instructions:
  /external/llvm/lib/Target/CellSPU/
SPUNodes.td 61 // SPU Vector shift pseudo-instruction type constraints
76 // Synthetic/pseudo-instructions
  /external/llvm/lib/Target/XCore/
XCoreRegisterInfo.cpp 114 // ADJCALLSTACKUP pseudo instructions
157 // Replace the pseudo instruction with a new instruction...
  /external/openssl/crypto/bn/
bn_rand.c 230 static int bn_rand_range(int pseudo, BIGNUM *r, const BIGNUM *range)
232 int (*bn_rand)(BIGNUM *, int, int, int) = pseudo ? BN_pseudo_rand : BN_rand;
  /external/qemu/slirp/
ip_icmp.c 41 /* Be nice and tell them it's just a pseudo-ping packet */
42 static const char icmp_ping_msg[] = "This is a pseudo-PING packet used by Slirp to emulate ICMP ECHO-REQUEST packets.\n";
  /external/qemu/slirp-android/
ip_icmp.c 42 /* Be nice and tell them it's just a pseudo-ping packet */
43 static const char icmp_ping_msg[] = "This is a pseudo-PING packet used by Slirp to emulate ICMP ECHO-REQUEST packets.\n";

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