| /external/llvm/lib/Target/Alpha/ |
| AlphaISelLowering.cpp | 99 setOperationAction(ISD::SDIV , MVT::i64, Custom);
691 case ISD::SDIV:
695 return Op.getOpcode() == ISD::SDIV ? BuildSDIV(Op.getNode(), DAG, NULL)
702 case ISD::SDIV: opstr = "__divq"; break;
[all...] |
| /external/llvm/test/CodeGen/Generic/ |
| print-arith-int.ll | 35 %div_r = sdiv i32 %b, %a ; <i32> [#uses=1]
|
| /external/llvm/test/CodeGen/X86/ |
| fast-isel-x86-64.ll | 124 %Y = sdiv exact i32 %X, 8
|
| crash.ll | 88 %7 = sdiv i32 %6, -256 ; <i32> [#uses=1]
138 %div.i = sdiv i32 115200, 0
|
| 2009-10-25-RewriterBug.ll | 76 %25 = sdiv i32 %storemerge52.i, 8 ; <i32> [#uses=0]
|
| /external/llvm/test/Transforms/ConstProp/ |
| constant-expr.ll | 14 @D = global i1 sdiv (i1 icmp ult (i8* @X, i8* @Y), i1 icmp ult (i8* @X, i8* @Z))
|
| /external/llvm/test/Transforms/InstSimplify/ |
| compare.ll | 305 %A = sdiv i32 %X, 1000000
|
| /external/llvm/utils/ |
| llvm.grm | 59 udiv | OptExact sdiv | fdiv | urem | srem | frem ;
|
| /external/llvm/lib/VMCore/ |
| ConstantFold.cpp | [all...] |
| /external/llvm/lib/ExecutionEngine/ |
| ExecutionEngine.cpp | 683 case Instruction::SDiv:
701 case Instruction::SDiv:GV.IntVal = LHS.IntVal.sdiv(RHS.IntVal); break;
[all...] |
| /frameworks/compile/libbcc/lib/CodeGen/ |
| CodeEmitter.cpp | 363 case llvm::Instruction::SDiv:
392 case llvm::Instruction::SDiv: {
393 Result.IntVal = LHS.IntVal.sdiv(RHS.IntVal);
[all...] |
| /external/llvm/include/llvm/ADT/ |
| APInt.h | 65 /// of the operation. For example, sdiv and udiv. However, because the bit
766 APInt sdiv(const APInt &RHS) const {
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| FastISel.cpp | 372 // Transform "sdiv exact X, 8" -> "sra X, 3".
373 if (ISDOpcode == ISD::SDIV && isa<BinaryOperator>(I) &&
897 case Instruction::SDiv:
898 return SelectBinaryOp(I, ISD::SDIV);
[all...] |
| /external/llvm/lib/ExecutionEngine/Interpreter/ |
| Execution.cpp | 538 case Instruction::SDiv: R.IntVal = Src1.IntVal.sdiv(Src2.IntVal); break;
[all...] |
| /external/llvm/lib/Target/CppBackend/ |
| CPPBackend.cpp | 811 case Instruction::SDiv: Out << "getSDiv("; break;
[all...] |
| /external/llvm/test/Bindings/Ocaml/ |
| vmcore.ml | 223 * RUN: grep {@const_sdiv = global i64 sdiv } < %t.ll
224 * RUN: grep {@const_exact_sdiv = global i64 sdiv exact } < %t.ll
[all...] |
| /external/qemu/target-arm/ |
| helper.h | 13 DEF_HELPER_2(sdiv, s32, s32, s32)
|
| /external/llvm/lib/Target/Blackfin/ |
| BlackfinISelLowering.cpp | 79 setOperationAction(ISD::SDIV, MVT::i16, Expand);
80 setOperationAction(ISD::SDIV, MVT::i32, Expand);
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 98 setOperationAction(ISD::SDIV, MVT::i32, Expand);
100 setOperationAction(ISD::SDIV, MVT::i64, Expand);
[all...] |
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineAddSub.cpp | 621 // 0 - (X sdiv C) -> (X sdiv -C)
|
| /external/llvm/test/Transforms/InstCombine/ |
| select.ll | 323 %V = sdiv i32 %Y, %R
326 ; CHECK: %V = sdiv i32 %Y, %X
|
| /external/llvm/lib/Target/CBackend/ |
| CBackend.cpp | 806 case Instruction::SDiv:
834 case Instruction::SDiv:
[all...] |
| /external/llvm/lib/Target/CellSPU/ |
| SPUISelLowering.cpp | 182 setOperationAction(ISD::SDIV, MVT::i8, Expand);
188 setOperationAction(ISD::SDIV, MVT::i16, Expand);
194 setOperationAction(ISD::SDIV, MVT::i32, Expand);
200 setOperationAction(ISD::SDIV, MVT::i64, Expand);
206 setOperationAction(ISD::SDIV, MVT::i128, Expand);
422 setOperationAction(ISD::SDIV, VT, Expand);
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 156 setOperationAction(ISD::SDIV, MVT::i8, Expand);
162 setOperationAction(ISD::SDIV, MVT::i16, Expand);
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | [all...] |
