| /dalvik/vm/mterp/x86/ |
| OP_INVOKE_VIRTUAL_QUICK.S | 10 /* op vAA, {vCCCC..v(CCCC+AA-1)}, meth@BBBB */
12 movzwl 2(rPC),%ecx # ecx<- BBBB
22 movl (%eax,%ecx,4),%eax # eax<- vtable[BBBB]
|
| OP_CONST_STRING_JUMBO.S | 10 movl (%ecx,%eax,4),%eax # eax<- rResString[BBBB]
14 SET_VREG %eax rINST # vAA<- rResString[BBBB]
|
| OP_INVOKE_INTERFACE.S | 11 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */
26 movzwl 2(rPC),%eax # eax<- BBBB
28 movl %eax,OUT_ARG1(%esp) # arg1<- BBBB
|
| OP_INVOKE_STATIC.S | 10 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */
12 movzwl 2(rPC),%eax # eax<- BBBB
23 movl %eax,OUT_ARG1(%esp) # arg1<- BBBB
|
| OP_FILLED_NEW_ARRAY.S | 10 /* op {vCCCC..v(CCCC+AA-1)}, type@BBBB */
13 movzwl 2(rPC),%ecx # ecx<- BBBB
23 movl %ecx,OUT_ARG1(%esp) # arg1<- BBBB
|
| OP_THROW_VERIFICATION_ERROR_JUMBO.S | 5 * exception is indicated by BBBB, with some detail provided by AAAAAAAA.
7 /* exop BBBB, ref@AAAAAAAA */
13 movl rINST,OUT_ARG1(%esp) # arg1<- BBBB
|
| OP_INVOKE_DIRECT.S | 15 /* op {vCCCC..v(CCCC+AA-1)}, meth@BBBB */
17 movzwl 2(rPC),%eax # eax<- BBBB
44 movzwl 2(rPC),%eax # reference (BBBB or CCCC)
|
| OP_IPUT_JUMBO.S | 42 * rINST holds BBBB
44 GET_VREG_R rINST rINST # rINST<- v[BBBB]
48 $store $reg,(%ecx,%eax,1) # obj.field <- v[BBBB](8/16/32 bits)
|
| OP_SGET.S | 10 /* op vAA, field@BBBB */
12 movzwl 2(rPC),%eax # eax<- field ref BBBB
30 movzwl 2(rPC),%eax # eax<- field ref BBBB
|
| OP_SGET_WIDE.S | 9 /* sget-wide vAA, field@BBBB */
11 movzwl 2(rPC),%eax # eax<- field ref BBBB
31 movzwl 2(rPC),%eax # eax<- field ref BBBB
|
| OP_SPUT.S | 10 /* op vAA, field@BBBB */
12 movzwl 2(rPC),%eax # eax<- field ref BBBB
30 movzwl 2(rPC),%eax # eax<- field ref BBBB
|
| /dalvik/vm/mterp/x86-atom/ |
| OP_CONST_STRING_JUMBO.S | 24 * index into the specified register. vAA <- pResString[BBBB]
38 movl (%eax, %ecx, 4), %eax # %eax<- pResStrings[BBBB]
41 SET_VREG %eax, rINST # vAA<- %eax; pResString[BBBB]
48 * %ecx: BBBB (Class ref)
65 SET_VREG %eax, rINST # vAA<- %eax; pResString[BBBB]
|
| OP_CONST.S | 32 shl $$16, %edx # move BBBB to high bits
|
| /dalvik/vm/mterp/armv5te/ |
| OP_INVOKE_SUPER_QUICK.S | 10 /* op vAA, {vCCCC..v(CCCC+AA-1)}, meth@BBBB */
16 FETCH(r1, 1) @ r1<- BBBB
23 ldr r0, [r2, r1, lsl #2] @ r0<- super->vtable[BBBB]
|
| OP_CONST.S | 4 FETCH(r0, 1) @ r0<- bbbb (low)
5 FETCH(r1, 2) @ r1<- BBBB (high)
|
| OP_CONST_HIGH16.S | 3 FETCH(r0, 1) @ r0<- 0000BBBB (zero-extended)
|
| OP_CONST_WIDE_HIGH16.S | 3 FETCH(r1, 1) @ r1<- 0000BBBB (zero-extended)
|
| OP_NEW_INSTANCE.S | 12 /* new-instance vAA, class@BBBB */
14 FETCH(r1, 1) @ r1<- BBBB
92 * r1 holds BBBB
|
| OP_THROW_VERIFICATION_ERROR_JUMBO.S | 5 * exception is indicated by BBBB, with some detail provided by AAAAAAAA.
7 /* exop BBBB, Class@AAAAAAAA */
13 FETCH(r1, 3) @ r1<- BBBB
|
| OP_CONST_CLASS.S | 5 /* const/class vAA, Class@BBBB */
6 FETCH(r1, 1) @ r1<- BBBB
10 ldr r0, [r2, r1, lsl #2] @ r0<- pResClasses[BBBB]
21 * r1: BBBB (Class ref)
|
| OP_CONST_STRING.S | 5 /* const/string vAA, String@BBBB */
6 FETCH(r1, 1) @ r1<- BBBB
10 ldr r0, [r2, r1, lsl #2] @ r0<- pResStrings[BBBB]
21 * r1: BBBB (String ref)
|
| OP_CONST_STRING_JUMBO.S | 6 FETCH(r0, 1) @ r0<- bbbb (low)
7 FETCH(r1, 2) @ r1<- BBBB (high)
12 ldr r0, [r2, r1, lsl #2] @ r0<- pResStrings[BBBB]
|
| OP_SGET_JUMBO.S | 24 FETCH(r2, 3) @ r2<- BBBB
26 SET_VREG(r1, r2) @ fp[BBBB]<- r1
|
| OP_SGET_WIDE_JUMBO.S | 19 FETCH(r9, 3) @ r9<- BBBB
26 add r9, rFP, r9, lsl #2 @ r9<- &fp[BBBB]
|
| OP_SPUT_JUMBO.S | 22 FETCH(r2, 3) @ r2<- BBBB
24 GET_VREG(r1, r2) @ r1<- fp[BBBB]
|
