| /external/llvm/lib/Target/Alpha/ |
| AlphaISelLowering.cpp | 1 //===-- AlphaISelLowering.cpp - Alpha DAG Lowering Implementation ---------===//
194 static SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) {
197 SDValue JTI = DAG.getTargetJumpTable(JT->getIndex(), PtrVT);
201 SDValue Hi = DAG.getNode(AlphaISD::GPRelHi, dl, MVT::i64, JTI,
202 DAG.getGLOBAL_OFFSET_TABLE(MVT::i64));
203 SDValue Lo = DAG.getNode(AlphaISD::GPRelLo, dl, MVT::i64, JTI, Hi);
235 DebugLoc dl, SelectionDAG &DAG,
242 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(),
243 getTargetMachine(), ArgLocs, *DAG.getContext());
250 Chain = DAG.getCALLSEQ_START(Chain, DAG.getConstant(NumBytes
[all...] |
| AlphaISelLowering.h | 1 //===-- AlphaISelLowering.h - Alpha DAG Lowering Interface ------*- C++ -*-===//
11 // selection DAG.
73 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
79 SelectionDAG &DAG) const;
87 DebugLoc dl, SelectionDAG &DAG,
115 SelectionDAG &DAG) const;
121 DebugLoc dl, SelectionDAG &DAG,
130 DebugLoc dl, SelectionDAG &DAG,
138 DebugLoc dl, SelectionDAG &DAG) const;
|
| /external/llvm/lib/Target/Blackfin/ |
| BlackfinISelDAGToDAG.cpp | 1 //===- BlackfinISelDAGToDAG.cpp - A dag to dag inst selector for Blackfin -===//
46 return "Blackfin DAG->DAG Pattern Instruction Selection";
56 // Walk the DAG after instruction selection, fixing register class issues.
57 void FixRegisterClasses(SelectionDAG &DAG);
127 static void UpdateNodeOperand(SelectionDAG &DAG,
133 SDNode *New = DAG.UpdateNodeOperands(N, ops.data(), ops.size());
134 DAG.ReplaceAllUsesWith(N, New);
139 void BlackfinDAGToDAGISel::FixRegisterClasses(SelectionDAG &DAG) {
[all...] |
| BlackfinISelLowering.cpp | 1 //===- BlackfinISelLowering.cpp - Blackfin DAG Lowering Implementation ----===//
11 // into a selection DAG.
146 SelectionDAG &DAG) const {
150 Op = DAG.getTargetGlobalAddress(GV, DL, MVT::i32);
151 return DAG.getNode(BFISD::Wrapper, DL, MVT::i32, Op);
155 SelectionDAG &DAG) const {
159 Op = DAG.getTargetJumpTable(JTI, MVT::i32);
160 return DAG.getNode(BFISD::Wrapper, DL, MVT::i32, Op);
168 DebugLoc dl, SelectionDAG &DAG,
172 MachineFunction &MF = DAG.getMachineFunction()
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.h | 1 //==-- SystemZISelLowering.h - SystemZ DAG Lowering Interface ----*- C++ -*-==//
11 // selection DAG.
63 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
66 /// DAG node.
74 SDValue LowerBR_CC(SDValue Op, SelectionDAG &DAG) const;
75 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
76 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
77 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
78 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
82 SelectionDAG &DAG) const
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| DAGCombiner.cpp | 1 //===-- DAGCombiner.cpp - Implement a DAG node combiner -------------------===//
10 // This pass combines dag nodes to form fewer, simpler DAG nodes. It can be run
11 // both before and after the DAG is legalized.
41 STATISTIC(NodesCombined , "Number of dag nodes combined");
59 SelectionDAG &DAG;
69 // AA - Used for DAG load/store alias analysis.
147 /// target-specific DAG combines.
150 // Visitation implementation - Implement dag node combining for different
282 : DAG(D), TLI(D.getTargetLoweringInfo()), Level(Unrestricted)
[all...] |
| LegalizeFloatTypes.cpp | 46 DEBUG(dbgs() << "Soften float result " << ResNo << ": "; N->dump(&DAG);
54 N->dump(&DAG); dbgs() << "\n";
119 return DAG.getNode(ISD::BUILD_PAIR, N->getDebugLoc(),
120 TLI.getTypeToTransformTo(*DAG.getContext(),
127 return DAG.getConstant(N->getValueAPF().bitcastToAPInt(),
128 TLI.getTypeToTransformTo(*DAG.getContext(),
134 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, N->getDebugLoc(),
140 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
146 SDValue Mask = DAG.getConstant(API, NVT);
148 return DAG.getNode(ISD::AND, N->getDebugLoc(), NVT, Op, Mask)
[all...] |
| TargetLowering.cpp | [all...] |
| LegalizeTypes.cpp | 1 //===-- LegalizeTypes.cpp - Common code for DAG type legalizer ------------===//
41 // Note that it is possible to have nodes marked NewNode in the DAG. This can
44 // folding that occurs when using the DAG.getNode operators. Secondly, a new
46 // into a different node, leaving the original node as a NewNode in the DAG.
55 // to live on in the DAG.
56 // The conclusion is that though there may be nodes marked NewNode in the DAG,
68 // over the DAG we never dereference deleted nodes). This means that it may
74 for (SelectionDAG::allnodes_iterator I = DAG.allnodes_begin(),
75 E = DAG.allnodes_end(); I != E; ++I) {
177 /// top-down traversal of the dag, legalizing types as it goes. Returns "true
[all...] |
| ScheduleDAGSDNodes.cpp | 52 void ScheduleDAGSDNodes::Run(SelectionDAG *dag, MachineBasicBlock *bb,
54 DAG = dag;
71 const TargetLowering &TLI = DAG->getTargetLoweringInfo();
126 static void AddGlue(SDNode *N, SDValue Glue, bool AddGlue, SelectionDAG *DAG) {
149 SDVTList VTList = DAG->getVTList(&VTs[0], VTs.size());
159 DAG->MorphNodeTo(N, N->getOpcode(), VTList, &Ops[0], Ops.size());
233 AddGlue(Lead, SDValue(0, 0), true, DAG);
240 AddGlue(Load, InGlue, OutGlue, DAG);
252 for (SelectionDAG::allnodes_iterator NI = DAG->allnodes_begin()
[all...] |
| /external/llvm/lib/Target/PTX/ |
| PTXISelLowering.cpp | 1 //===-- PTXISelLowering.cpp - PTX DAG Lowering Implementation -------------===//
109 SDValue PTXTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {
114 return LowerSETCC(Op, DAG);
116 return LowerGlobalAddress(Op, DAG);
147 SDValue PTXTargetLowering::LowerSETCC(SDValue Op, SelectionDAG &DAG) const {
163 return DAG.getNode(ISD::AND, dl, MVT::i1, Op0, Op1);
166 return DAG.getNode(ISD::SETCC, dl, MVT::i1, Op0, Op1, Op2);
170 LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const {
177 SDValue targetGlobal = DAG.getTargetGlobalAddress(GV, dl, PtrVT);
178 SDValue movInstr = DAG.getNode(PTXISD::COPY_ADDRESS
[all...] |
| PTXSelectionDAGInfo.h | 33 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl,
42 SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl,
|
| /external/llvm/include/llvm/Target/ |
| TargetSelectionDAGInfo.h | 57 EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl,
74 EmitTargetCodeForMemmove(SelectionDAG &DAG, DebugLoc dl,
90 EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl,
|
| /external/llvm/lib/Target/ARM/ |
| ARMHazardRecognizer.h | 41 const ScheduleDAG *DAG) :
42 ScoreboardHazardRecognizer(ItinData, DAG, "post-RA-sched"), TII(tii),
|
| ARMISelLowering.cpp | 1 //===-- ARMISelLowering.cpp - ARM DAG Lowering Implementation -------------===//
11 // selection DAG.
[all...] |
| ARMSelectionDAGInfo.h | 48 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl,
58 SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl,
|
| /external/llvm/lib/Target/X86/ |
| X86SelectionDAGInfo.h | 37 SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, DebugLoc dl,
45 SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, DebugLoc dl,
|
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.cpp | 1 //===-- MipsISelLowering.cpp - Mips DAG Lowering Implementation -----------===//
11 // selection DAG.
391 static SDValue PerformADDECombine(SDNode *N, SelectionDAG& DAG,
397 if (Subtarget->hasMips32() && SelectMadd(N, &DAG))
403 static SDValue PerformSUBECombine(SDNode *N, SelectionDAG& DAG,
409 if (Subtarget->hasMips32() && SelectMsub(N, &DAG))
415 static SDValue PerformDivRemCombine(SDNode *N, SelectionDAG& DAG,
428 SDValue DivRem = DAG.getNode(opc, dl, MVT::Glue,
430 SDValue InChain = DAG.getEntryNode();
435 SDValue CopyFromLo = DAG.getCopyFromReg(InChain, dl, LO, Ty
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | 1 //===-- MSP430ISelLowering.cpp - MSP430 DAG Lowering Implementation ------===//
180 SelectionDAG &DAG) const {
184 case ISD::SRA: return LowerShifts(Op, DAG);
185 case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG);
186 case ISD::BlockAddress: return LowerBlockAddress(Op, DAG);
187 case ISD::ExternalSymbol: return LowerExternalSymbol(Op, DAG);
188 case ISD::SETCC: return LowerSETCC(Op, DAG);
189 case ISD::BR_CC: return LowerBR_CC(Op, DAG);
190 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
191 case ISD::SIGN_EXTEND: return LowerSIGN_EXTEND(Op, DAG);
[all...] |
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeISelLowering.h | 1 //===-- MBlazeISelLowering.h - MBlaze DAG Lowering Interface ----*- C++ -*-===//
11 // selection DAG.
98 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
101 // DAG node.
116 DebugLoc dl, SelectionDAG &DAG,
120 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
121 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
122 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const;
123 SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
124 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const
[all...] |
| MBlazeISelLowering.cpp | 1 //===-- MBlazeISelLowering.cpp - MBlaze DAG Lowering Implementation -------===//
11 // selection DAG.
196 SelectionDAG &DAG) const {
199 case ISD::ConstantPool: return LowerConstantPool(Op, DAG);
200 case ISD::GlobalAddress: return LowerGlobalAddress(Op, DAG);
201 case ISD::GlobalTLSAddress: return LowerGlobalTLSAddress(Op, DAG);
202 case ISD::JumpTable: return LowerJumpTable(Op, DAG);
203 case ISD::SELECT_CC: return LowerSELECT_CC(Op, DAG);
204 case ISD::VASTART: return LowerVASTART(Op, DAG);
569 SelectionDAG &DAG) const
[all...] |
| /external/clang/test/CodeGenCXX/ |
| debug-info-byval.cpp | 4 class DAG {
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCHazardRecognizers.h | 27 const ScheduleDAG *DAG;
31 ScoreboardHazardRecognizer(ItinData, DAG_), DAG(DAG_) {}
|
| /external/llvm/include/llvm/CodeGen/ |
| ScoreboardHazardRecognizer.h | 96 const ScheduleDAG *DAG;
109 const ScheduleDAG *DAG,
|
| /external/llvm/lib/CodeGen/ |
| ScoreboardHazardRecognizer.cpp | 35 ScheduleHazardRecognizer(), ItinData(II), DAG(SchedDAG), IssueWidth(0),
118 const MCInstrDesc *MCID = DAG->getInstrDesc(SU);
158 DEBUG(DAG->dumpNode(SU));
176 const MCInstrDesc *MCID = DAG->getInstrDesc(SU);
178 if (DAG->TII->isZeroCost(MCID->Opcode))
|
