/external/llvm/tools/bugpoint/ |
ExtractFunction.cpp | 216 Constant *FP = CS->getOperand(1); 217 if (ConstantExpr *CE = dyn_cast<ConstantExpr>(FP)) 219 FP = CE->getOperand(0); 220 if (Function *F = dyn_cast<Function>(FP)) {
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/external/clang/test/SemaCXX/ |
explicit.cpp | 172 struct FP { 179 FP fp; local 181 fp(1);
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/external/llvm/include/llvm/ |
PassManagers.h | 448 FunctionPass *FP = static_cast<FunctionPass *>(PassVector[N]); 449 return FP;
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/external/llvm/lib/Target/Mips/MCTargetDesc/ |
MipsBaseInfo.h | 102 case Mips::FP: case Mips::FP_64: case Mips::F30: case Mips::D30_64:
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/external/llvm/lib/Target/XCore/ |
XCoreRegisterInfo.cpp | 217 bool FP = TFI->hasFP(MF); 227 if (FP) {
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/external/oprofile/events/i386/westmere/ |
unit_masks | 84 0x04 sse_fp SSE and SSE2 FP Uops 86 0x10 sse_fp_packed SSE FP packed Uops 87 0x20 sse_fp_scalar SSE FP scalar Uops 88 0x40 sse_single_precision SSE* FP single precision Uops 89 0x80 sse_double_precision SSE* FP double precision Uops
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/external/llvm/examples/Kaleidoscope/Chapter4/ |
toy.cpp | 519 double (*FP)() = (double (*)())(intptr_t)FPtr; 520 fprintf(stderr, "Evaluated to %f\n", FP());
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/external/oprofile/events/mips/rm7000/ |
events | 27 event:0x17 counters:0,1 um:zero minimum:500 name:FP_EXCEPTION_STALL_CYCLES : FP possible exception cycles
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/external/llvm/lib/ExecutionEngine/ |
ExecutionEngine.cpp | 319 Constant *FP = CS->getOperand(1); 320 if (FP->isNullValue()) 324 if (ConstantExpr *CE = dyn_cast<ConstantExpr>(FP)) 326 FP = CE->getOperand(0); 329 if (Function *F = dyn_cast<Function>(FP)) [all...] |
/external/llvm/examples/Kaleidoscope/Chapter5/ |
toy.cpp | 764 double (*FP)() = (double (*)())(intptr_t)FPtr; 765 fprintf(stderr, "Evaluated to %f\n", FP());
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/external/llvm/examples/Kaleidoscope/Chapter6/ |
toy.cpp | 875 double (*FP)() = (double (*)())(intptr_t)FPtr; 876 fprintf(stderr, "Evaluated to %f\n", FP());
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/external/oprofile/events/mips/24K/ |
events | 33 event:0xf counters:0 um:zero minimum:500 name:LOAD_INSNS : 15-0 Load instructions completed (including FP) 97 event:0x40f counters:1 um:zero minimum:500 name:STORE_INSNS : 15-1 Stores completed (including FP)
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/external/oprofile/events/mips/34K/ |
events | 33 event:0xf counters:0 um:zero minimum:500 name:LOAD_INSNS : 15-0 Load instructions completed (including FP) 105 event:0x40f counters:1 um:zero minimum:500 name:STORE_INSNS : 15-1 Stores completed (including FP)
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/external/openssl/crypto/des/ |
des_locl.h | 363 /* IP and FP 394 Thanks for hints from Richard Outerbridge - he told me IP&FP 414 #define FP(l,r) \
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/external/oprofile/events/mips/1004K/ |
events | 33 event:0xf counters:0 um:zero minimum:500 name:LOAD_INSNS : 15-0 Load instructions completed (including FP) 113 event:0x40f counters:1 um:zero minimum:500 name:STORE_INSNS : 15-1 Stores completed (including FP)
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/external/llvm/examples/Kaleidoscope/Chapter7/ |
toy.cpp | 1038 double (*FP)() = (double (*)())(intptr_t)FPtr; 1039 fprintf(stderr, "Evaluated to %f\n", FP()); [all...] |
/external/llvm/lib/Target/CBackend/ |
CBackend.cpp | 648 // only deal in IEEE FP). [all...] |
/external/oprofile/events/i386/nehalem/ |
events | 30 event:0x10 counters:0,1,2,3 um:fp_comp_ops_exe minimum:6000 name:FP_COMP_OPS_EXE : Counts the number of FP Computational Uops Executed. 33 event:0x14 counters:0,1,2,3 um:arith minimum:6000 name:ARITH : Counts division cycles and number of multiplies. Includes integer and FP, but excludes DPPS/MPSAD.
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/external/oprofile/events/x86-64/family10/ |
unit_masks | 261 0x01 Number of cycles a bottom-execute uops in FP scheduler 262 0x02 Number of cycles a bottom-serializing uops in FP scheduler
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/external/llvm/lib/Target/ARM/ |
ARMBaseRegisterInfo.cpp | 395 unsigned FP = TFI->hasFP(MF) ? 1 : 0; 396 return 10 - FP - (STI.isR9Reserved() ? 1 : 0); 414 // No FP, R9 is available. 426 // FP is R7, R9 is available. 438 // FP is R11, R9 is available. 450 // No FP, R9 is not available. 462 // FP is R7, R9 is not available. 474 // FP is R11, R9 is not available. 607 // Thumb has trouble with negative offsets from the FP. Thumb2 has a limited 927 /// reference would be better served by a base register other than FP [all...] |
ARMFastISel.cpp | 497 // the combined constant into an FP reg. 521 // Require VFP2 for loading fp constants. [all...] |
/external/oprofile/events/x86-64/family11h/ |
events | 92 event:0xcb counters:0,1,2,3 um:fpu_instr minimum:500 name:RETIRED_MMX_FP_INSTRUCTIONS : Retired MMX/FP instructions
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/external/oprofile/events/x86-64/hammer/ |
events | 87 event:0xcb counters:0,1,2,3 um:fpu_instr minimum:500 name:RETIRED_MMX_FP_INSTRUCTIONS : Retired MMX/FP instructions
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/external/clang/lib/Sema/ |
SemaTemplateInstantiate.cpp | [all...] |
/external/llvm/lib/Target/Alpha/ |
AlphaISelLowering.cpp | 220 // //#define FP $15 556 //if fp && Offset < 6*8, then subtract 6*8 from DataPtr 625 SDValue FP = DAG.getNode(isDouble?AlphaISD::CVTQT_:AlphaISD::CVTQS_, dl, 627 return FP; [all...] |