| /external/llvm/lib/VMCore/ |
| Instruction.cpp | 96 const char *Instruction::getOpcodeName(unsigned OpCode) {
97 switch (OpCode) {
190 // We have two instructions of identical opcode and #operands. Check to see
245 // We have two instructions of identical opcode and #operands. Check to see
367 bool Instruction::isAssociative(unsigned Opcode) {
368 return Opcode == And || Opcode == Or || Opcode == Xor ||
369 Opcode == Add || Opcode == Mul
[all...] |
| /external/v8/src/mips/ |
| constants-mips.h | 198 enum Opcode {
557 inline Opcode OpcodeValue() const {
558 return static_cast<Opcode>(
618 inline Opcode OpcodeFieldRaw() const {
619 return static_cast<Opcode>(InstructionBits() & kOpcodeMask);
653 // Get the secondary field according to the opcode.
655 Opcode op = OpcodeFieldRaw();
|
| /external/v8/src/ |
| deoptimizer.cc | 381 Translation::Opcode opcode = local
382 static_cast<Translation::Opcode>(iterator.Next());
383 ASSERT(Translation::BEGIN == opcode);
384 USE(opcode);
443 Translation::Opcode opcode = local
444 static_cast<Translation::Opcode>(iterator->Next());
445 while (opcode == Translation::DUPLICATE) {
446 opcode = static_cast<Translation::Opcode>(iterator->Next())
626 Translation::Opcode opcode = local
1163 Translation::Opcode opcode = local
1223 Translation::Opcode opcode = static_cast<Translation::Opcode>(it.Next()); local
[all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMExpandPseudoInsts.cpp | 360 static const NEONLdStTableEntry *LookupNEONLdSt(unsigned Opcode) {
375 std::lower_bound(NEONLdStTable, NEONLdStTable + NumEntries, Opcode);
376 if (I != NEONLdStTable + NumEntries && I->PseudoOpc == Opcode)
646 unsigned Opcode = MI.getOpcode();
651 bool isCC = Opcode == ARM::MOVCCi32imm || Opcode == ARM::t2MOVCCi32imm;
656 (Opcode == ARM::MOVi32imm || Opcode == ARM::MOVCCi32imm)) {
[all...] |
| /external/javassist/src/main/javassist/bytecode/analysis/ |
| SubroutineScanner.java | 27 import javassist.bytecode.Opcode;
34 public class SubroutineScanner implements Opcode {
84 int opcode = iter.byteAt(pos); local
86 if (opcode == TABLESWITCH) {
92 if (opcode == LOOKUPSWITCH) {
99 if (Util.isReturn(opcode) || opcode == RET || opcode == ATHROW)
102 if (Util.isJumpInstruction(opcode)) {
104 if (opcode == JSR || opcode == JSR_W)
[all...] |
| /external/llvm/include/llvm/MC/ |
| MCInstrDesc.h | 135 unsigned short Opcode; // The opcode number
159 /// getOpcode - Return the opcode number for this descriptor.
161 return Opcode;
274 /// or zero if the encoding size cannot be known from the opcode.
|
| /external/llvm/lib/Target/PTX/InstPrinter/ |
| PTXInstPrinter.cpp | 36 StringRef PTXInstPrinter::getOpcodeName(unsigned Opcode) const {
37 return getInstructionName(Opcode);
|
| /external/webkit/Source/JavaScriptCore/bytecode/ |
| Instruction.h | 33 #include "Opcode.h"
57 // Structure used by op_get_by_id_self_list and op_get_by_id_proto_list instruction to hold data off the main opcode stream.
126 Instruction(Opcode opcode)
130 // the entire struct is initialized, when opcode is not a pointer.
133 u.opcode = opcode;
163 Opcode opcode; member in union:JSC::Instruction::__anon13062
|
| Opcode.h | 196 macro(op_end, 2) // end must be the last opcode in the list
198 #define OPCODE_ID_ENUM(opcode, length) opcode,
208 #define OPCODE_LENGTH(opcode) opcode##_length
210 #define OPCODE_ID_LENGTH_MAP(opcode, length) length,
220 typedef void* Opcode;
222 typedef const void* Opcode;
225 typedef OpcodeID Opcode;
256 static void recordInstruction(int opcode);
[all...] |
| /dalvik/vm/compiler/ |
| InlineTransformation.cpp | 66 (moveResultMIR->dalvikInsn.opcode != OP_MOVE_RESULT &&
67 moveResultMIR->dalvikInsn.opcode != OP_MOVE_RESULT_OBJECT &&
68 moveResultMIR->dalvikInsn.opcode != OP_MOVE_RESULT_WIDE)) {
72 int dfFlags = dvmCompilerDataFlowAttributes[getterInsn.opcode];
76 LOGE("opcode %d has DF_UA set (not expected)", getterInsn.opcode);
95 newGetterMIR->width = dexGetWidthFromOpcode(getterInsn.opcode);
112 invokeMIR->dalvikInsn.opcode = (Opcode)kMirOpCheckInlinePrediction;
159 int dfFlags = dvmCompilerDataFlowAttributes[setterInsn.opcode];
317 Opcode opcode = lastMIRInsn->dalvikInsn.opcode; local
[all...] |
| /external/clang/lib/StaticAnalyzer/Core/ |
| SimpleConstraintManager.h | 45 BinaryOperator::Opcode op,
|
| /external/javassist/src/main/javassist/expr/ |
| Handler.java | 127 b.addOpcode(Opcode.GOTO);
|
| /external/javassist/src/main/javassist/util/proxy/ |
| ProxyFactory.java | [all...] |
| /external/llvm/include/llvm/Transforms/Utils/ |
| AddrModeMatcher.h | 99 bool MatchOperationAddr(User *Operation, unsigned Opcode, unsigned Depth);
|
| /external/llvm/lib/Target/Blackfin/ |
| BlackfinISelLowering.h | 52 const char *getTargetNodeName(unsigned Opcode) const;
|
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.h | 63 virtual const char *getTargetNodeName(unsigned Opcode) const;
|
| /external/llvm/lib/Target/XCore/ |
| XCoreInstrInfo.cpp | 58 int Opcode = MI->getOpcode();
59 if (Opcode == XCore::LDWFI)
80 int Opcode = MI->getOpcode();
81 if (Opcode == XCore::STWFI)
129 /// the correspondent Branch instruction opcode.
142 /// opcode that matches the cc.
398 /// ReverseBranchCondition - Return the inverse opcode of the
|
| /external/llvm/utils/TableGen/ |
| X86RecognizableInstr.h | 38 /// The opcode of the instruction, as used in an MCInst
44 /// The opcode field from the record; this is the opcode used in the Intel
46 uint8_t Opcode;
|
| FastISelEmitter.cpp | 587 const std::string &Opcode = I->first;
590 OS << "// FastEmit functions for " << Opcode << ".\n";
593 // Emit one function for each opcode,type pair.
606 << getLegalCName(Opcode)
666 << getLegalCName(Opcode) << "_"
678 << getLegalCName(Opcode) << "_" << getLegalCName(getName(VT))
690 << getLegalCName(Opcode) << "_"
758 // Emit one function for the opcode that demultiplexes based on the type.
760 << getLegalCName(Opcode) << "_";
773 << getLegalCName(Opcode) << "_" << getLegalCName(TypeName) << "_"
[all...] |
| /external/v8/src/arm/ |
| constants-arm.h | 191 enum Opcode {
635 return static_cast<Opcode>(Bits(24, 21));
637 inline Opcode OpcodeField() const {
638 return static_cast<Opcode>(BitField(24, 21));
|
| /external/webkit/Source/WebCore/xml/ |
| XPathPredicate.cpp | 70 NumericOp::NumericOp(Opcode opcode, Expression* lhs, Expression* rhs)
71 : m_opcode(opcode)
101 EqTestOp::EqTestOp(Opcode opcode, Expression* lhs, Expression* rhs)
102 : m_opcode(opcode)
204 LogicalOp::LogicalOp(Opcode opcode, Expression* lhs, Expression* rhs)
205 : m_opcode(opcode)
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelDAGToDAG.cpp | 86 /// rotate and mask opcode and mask operation.
143 /// Reg in an asm, because the load or store opcode would have to change.
303 // opcode and that it has a immediate integer right operand.
341 unsigned Opcode = N->getOpcode();
346 if (Opcode == ISD::SHL) {
351 } else if (Opcode == ISD::SRL) {
358 } else if (Opcode == ISD::ROTL) {
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86CodeEmitter.cpp | 613 unsigned Opcode = Desc->Opcode;
615 // Emit the lock opcode prefix as needed.
619 // Emit segment override opcode prefix as needed.
631 // Emit the repeat opcode prefix as needed.
635 // Emit the operand size opcode prefix as needed.
639 // Emit the address size opcode prefix as needed.
645 case X86II::TB: // Two-byte opcode prefix
668 break; // Two-byte opcode prefix
679 // 0x0F escape code must be emitted just before the opcode
[all...] |
| X86MCInstLower.cpp | 231 static void SimplifyShortImmForm(MCInst &Inst, unsigned Opcode) {
246 Inst.setOpcode(Opcode);
252 unsigned Opcode) {
297 Inst.setOpcode(Opcode);
397 unsigned Opcode = OutMI.getOpcode();
400 OutMI.setOpcode(Opcode);
416 unsigned Opcode;
418 default: assert(0 && "Invalid opcode");
419 case X86::TAILJMPr: Opcode = X86::JMP32r; break;
421 case X86::TAILJMPd64: Opcode = X86::JMP_1; break
[all...] |
| /external/llvm/lib/Transforms/InstCombine/ |
| InstructionCombining.cpp | 124 Instruction::BinaryOps Opcode = I.getOpcode();
125 if (Opcode != Instruction::Add &&
126 Opcode != Instruction::Sub) {
141 if (Opcode == Instruction::Add) {
172 Instruction::BinaryOps Opcode = I.getOpcode();
188 if (Op0 && Op0->getOpcode() == Opcode) {
194 if (Value *V = SimplifyBinOp(Opcode, B, C, TD)) {
217 if (Op1 && Op1->getOpcode() == Opcode) {
223 if (Value *V = SimplifyBinOp(Opcode, A, B, TD)) {
239 if (Op0 && Op0->getOpcode() == Opcode) {
[all...] |
