| /external/llvm/lib/Target/CellSPU/ |
| SPUFrameLowering.cpp | 251 const TargetRegisterClass *RC = &SPU::R32CRegClass;
252 RS->setScavengingFrameIndex(MFI->CreateStackObject(RC->getSize(),
253 RC->getAlignment(),
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| SPURegisterInfo.cpp | 347 const TargetRegisterClass *RC,
351 unsigned Reg = RS->FindUnusedReg(RC);
353 Reg = RS->scavengeRegister(RC, II, SPAdj);
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| /external/llvm/include/llvm/CodeGen/ |
| MachineRegisterInfo.h | 225 void setRegClass(unsigned Reg, const TargetRegisterClass *RC);
228 /// register to be a common subclass of RC and the current register class,
235 const TargetRegisterClass *RC,
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| /external/llvm/lib/CodeGen/ |
| LocalStackSlotAllocation.cpp | 321 const TargetRegisterClass *RC = TRI->getPointerRegClass();
322 BaseReg = Fn.getRegInfo().createVirtualRegister(RC);
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| Spiller.cpp | 222 const TargetRegisterClass *RC = mf->getRegInfo().getRegClass(LRE.getReg());
223 LiveInterval &SI = lss->getOrCreateInterval(SS, RC);
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| MachineSSAUpdater.cpp | 114 const TargetRegisterClass *RC,
117 unsigned NewVR = MRI->createVirtualRegister(RC);
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| MachineVerifier.cpp | 751 const TargetRegisterClass *RC = MRI->getRegClass(Reg);
754 TRI->getSubClassWithSubReg(RC, SubIdx);
757 *OS << "Register class " << RC->getName()
761 if (RC != SRC) {
763 *OS << "Register class " << RC->getName()
771 TRI->getLargestLegalSuperClass(RC);
782 if (!RC->hasSuperClassEq(DRC)) {
785 << RC->getName() << " register\n";
[all...] |
| ProcessImplicitDefs.cpp | 276 const TargetRegisterClass* RC = MRI->getRegClass(Reg);
277 unsigned NewVReg = MRI->createVirtualRegister(RC);
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| MachineFunction.cpp | 391 const TargetRegisterClass *RC) {
395 assert(MRI.getRegClass(VReg) == RC && "Register class mismatch!");
398 VReg = MRI.createVirtualRegister(RC);
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| /external/llvm/utils/TableGen/ |
| CodeGenTarget.cpp | 189 const CodeGenRegisterClass &RC = *RCs[i];
190 if (RC.contains(Reg)) {
191 const std::vector<MVT::SimpleValueType> &InVTs = RC.getValueTypes();
346 std::vector<CodeGenIntrinsic> llvm::LoadIntrinsics(const RecordKeeper &RC,
348 std::vector<Record*> I = RC.getAllDerivedDefinitions("Intrinsic");
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| AsmWriterEmitter.cpp | 732 const CodeGenRegisterClass &RC = *RegisterClasses[I];
735 std::string Name = RC.getName();
739 unsigned IE = RC.getOrder().size();
741 O << " if (Reg == " << getQualifiedName(RC.getOrder()[0]) << ")\n";
748 Record *Reg = RC.getOrder()[II];
[all...] |
| /external/llvm/include/llvm/Target/ |
| TargetLowering.h | 204 TargetRegisterClass *RC = RegClassForVT[VT.getSimpleVT().SimpleTy];
205 assert(RC && "This value type is not natively supported!");
206 return RC;
216 const TargetRegisterClass *RC = RepRegClassForVT[VT.getSimpleVT().SimpleTy];
217 return RC;
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCRegisterInfo.cpp | 322 const TargetRegisterClass *RC, int SPAdj) {
324 unsigned Reg = RS->FindUnusedReg(RC);
328 Reg = RS->scavengeRegister(RC, II, SPAdj);
372 const TargetRegisterClass *RC = LP64 ? G8RC : GPRC;
377 Reg = findScratchRegister(II, RS, RC, SPAdj);
465 const TargetRegisterClass *RC = Subtarget.isPPC64() ? G8RC : GPRC;
466 unsigned Reg = findScratchRegister(II, RS, RC, SPAdj);
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| PPCISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/Blackfin/ |
| BlackfinRegisterInfo.cpp | 180 const TargetRegisterClass *RC,
183 unsigned Reg = RS->FindUnusedReg(RC);
185 Reg = RS->scavengeRegister(RC, II, SPAdj);
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| ScheduleDAGFast.cpp | 570 const TargetRegisterClass *RC =
572 const TargetRegisterClass *DestRC = TRI->getCrossCopyRegClass(RC);
574 // If cross copy register class is the same as RC, then it must be
576 // If cross copy register class is not the same as RC, then it's
582 if (DestRC != RC) {
591 InsertCopiesAndMoveSuccs(LRDef, Reg, DestRC, RC, Copies);
|
| /external/llvm/lib/Target/ARM/ |
| ARMBaseInstrInfo.h | 117 const TargetRegisterClass *RC,
123 const TargetRegisterClass *RC,
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| /external/llvm/lib/Target/MBlaze/ |
| MBlazeInstrInfo.cpp | 95 const TargetRegisterClass *RC,
105 const TargetRegisterClass *RC,
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| MBlazeISelLowering.cpp | 427 // addic RC, R0, 0
428 // bneid RC, start
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreInstrInfo.cpp | 365 const TargetRegisterClass *RC,
379 const TargetRegisterClass *RC,
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| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.cpp | 310 TargetRegisterClass *RC;
320 RC = SystemZ::GR64RegisterClass;
323 RC = SystemZ::FP32RegisterClass;
326 RC = SystemZ::FP64RegisterClass;
330 unsigned VReg = RegInfo.createVirtualRegister(RC);
[all...] |
| /external/expat/bcb5/ |
| elements.mak | 146 .PATH.RC = $(PATHRC)
180 .rc.res:
|
| expat.mak | 147 .PATH.RC = $(PATHRC)
181 .rc.res:
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| expat_static.mak | 147 .PATH.RC = $(PATHRC)
183 .rc.res:
|
