HomeSort by relevance Sort by last modified time
    Searched refs:opcode (Results 526 - 550 of 681) sorted by null

<<2122232425262728

  /external/v8/src/x64/
deoptimizer-x64.cc 273 ASSERT(Translation::BEGIN == static_cast<Translation::Opcode>(value));
297 Translation::Opcode opcode = local
298 static_cast<Translation::Opcode>(iterator.Next());
299 ASSERT(Translation::BEGIN == opcode);
300 USE(opcode);
305 opcode = static_cast<Translation::Opcode>(iterator.Next());
306 USE(opcode);
307 ASSERT(Translation::FRAME == opcode);
434 Translation::Opcode opcode = local
    [all...]
assembler-x64.cc 567 void Assembler::arithmetic_op(byte opcode, Register reg, const Operand& op) {
570 emit(opcode);
575 void Assembler::arithmetic_op(byte opcode, Register reg, Register rm_reg) {
577 ASSERT((opcode & 0xC6) == 2);
579 // Swap reg and rm_reg and change opcode operand order.
581 emit(opcode ^ 0x02);
585 emit(opcode);
591 void Assembler::arithmetic_op_16(byte opcode, Register reg, Register rm_reg) {
593 ASSERT((opcode & 0xC6) == 2);
595 // Swap reg and rm_reg and change opcode operand order
    [all...]
  /prebuilt/linux-x86/toolchain/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/linux/
coda_psdev.h 63 int coda_downcall(int opcode, union outputArgs *out, struct super_block *sb);
  /dalvik/vm/analysis/
DexVerify.cpp 76 * - opcode of first instruction begins at index 0
104 Opcode opcode = dexOpcodeFromCodeUnit(*insns); local
105 if (opcode == OP_NEW_INSTANCE || opcode == OP_NEW_INSTANCE_JUMBO)
107 if (opcode == OP_MONITOR_ENTER)
230 * - opcode of first instruction begins at index 0
820 switch (decInsn.opcode) {
    [all...]
VfyBasicBlock.cpp 409 Opcode opcode = dexOpcodeFromCodeUnit(meth->insns[idx]); local
410 OpcodeFlags opFlags = dexGetFlagsFromOpcode(opcode);
445 } else if (opcode == OP_NOP && isDataChunk(meth->insns[nextIdx])) {
  /dalvik/vm/compiler/codegen/x86/
CodegenDriver.cpp 56 int flags = dexGetFlagsFromOpcode(mir->dalvikInsn.opcode);
61 if (mir->dalvikInsn.opcode == OP_NOP)
251 /* Print compiled opcode in this VM instance */
  /external/javassist/src/test/test/javassist/bytecode/analysis/
ScannerTest.java 13 import javassist.bytecode.Opcode;
118 /* 12 */ addJump(code, Opcode.GOTO, 125);
122 /* 20 */ addJump(code, Opcode.GOTO, 125);
124 /* 25 */ addJump(code, Opcode.JSR, 31);
126 /* 30 */ code.addOpcode(Opcode.ATHROW);
130 /* 33 */ code.addOpcode(Opcode.LOOKUPSWITCH);
139 /* 66 */ addJump(code, Opcode.GOTO, 111);
141 /* 71 */ addJump(code, Opcode.JSR, 77);
143 /* 76 */ code.add(Opcode.ATHROW);
148 /* 85 */ addJump(code, Opcode.GOTO, 106)
    [all...]
  /external/proguard/src/proguard/evaluation/
Processor.java 79 switch (simpleInstruction.opcode)
550 throw new IllegalArgumentException("Unknown simple instruction ["+simpleInstruction.opcode+"]");
559 switch (constantInstruction.opcode)
629 throw new IllegalArgumentException("Unknown constant pool instruction ["+constantInstruction.opcode+"]");
638 switch (variableInstruction.opcode)
741 throw new IllegalArgumentException("Unknown variable instruction ["+variableInstruction.opcode+"]");
750 switch (branchInstruction.opcode)
    [all...]
  /system/core/libpixelflinger/
pixelflinger.cpp 580 static void ggl_logicOp(void* con, GGLenum opcode)
583 if ((opcode < GGL_CLEAR) || (opcode > GGL_SET)) {
587 if (c->state.logic_op.opcode != opcode) {
588 c->state.logic_op.opcode = opcode;
801 c->state.logic_op.opcode = GGL_COPY;
  /external/llvm/utils/TableGen/
X86DisassemblerTables.cpp 253 /// to an opcode modifier type.
611 uint8_t opcode) {
643 errs() << "Opcode " << (uint16_t)opcode << "\n";
656 uint8_t opcode,
671 setTableFields(decision.opcodeDecisions[index].modRMDecisions[opcode],
674 opcode);
  /external/llvm/lib/Target/PTX/
PTXInstrInfo.cpp 37 const int opcode; member in struct:map_entry
58 const MCInstrDesc &MCID = get(map[i].opcode);
80 const MCInstrDesc &MCID = get(map[i].opcode);
198 DEBUG(dbgs() << "AnalyzeBranch: opcode: " << instLast1.getOpcode() << "\n");
319 GetPTXMachineNode(SelectionDAG *DAG, unsigned Opcode,
324 return DAG->getMachineNode(Opcode, dl, VT, ops, array_lengthof(ops));
328 GetPTXMachineNode(SelectionDAG *DAG, unsigned Opcode,
333 return DAG->getMachineNode(Opcode, dl, VT, ops, array_lengthof(ops));
  /external/proguard/src/proguard/classfile/util/
InstructionSequenceMatcher.java 437 // Check the opcode.
438 return instruction1.opcode == instruction2.opcode ||
439 instruction1.canonicalOpcode() == instruction2.opcode;
  /external/proguard/src/proguard/preverify/
CodePreverifier.java 603 * Returns whether the given instruction opcode represents a dup or swap
606 private boolean isDupOrSwap(int opcode)
608 return opcode >= InstructionConstants.OP_DUP &&
609 opcode <= InstructionConstants.OP_SWAP;
  /bionic/libc/netbsd/resolv/
res_mkquery.c 118 int op, /* opcode of query */
147 hp->opcode = op;
157 * perform opcode specific processing
  /external/freetype/src/truetype/
ttinterp.h 148 FT_Byte opcode; /* current opcode */ member in struct:TT_ExecContextRec_
149 FT_Int length; /* length of current opcode */
296 /* is the main function of the TrueType opcode interpreter. */
  /external/llvm/lib/Transforms/InstCombine/
InstCombineLoadStoreAlloca.cpp 317 Instruction::CastOps opcode = Instruction::BitCast; local
322 opcode = Instruction::IntToPtr;
325 opcode = Instruction::PtrToInt;
333 NewCast = IC.Builder->CreateCast(opcode, SIOp0, CastDstTy,
  /external/proguard/src/proguard/optimize/evaluation/
EvaluationSimplifier.java 161 switch (simpleInstruction.opcode)
244 switch (variableInstruction.opcode)
303 switch (constantInstruction.opcode)
335 switch (branchInstruction.opcode)
    [all...]
  /hardware/broadcom/wlan/bcm4329/dhdutil/include/proto/
bcmevent.h 272 uint8 opcode; member in struct:wl_event_data_if
  /hardware/broadcom/wlan/bcmdhd/dhdutil/include/proto/
bcmevent.h 272 uint8 opcode; member in struct:wl_event_data_if
  /system/core/libpixelflinger/codeflinger/
ARMAssembler.h 60 virtual void dataProcessing(int opcode, int cc, int s,
ARMAssemblerProxy.h 50 virtual void dataProcessing(int opcode, int cc, int s,
ARMAssemblerProxy.cpp 69 void ARMAssemblerProxy::dataProcessing( int opcode, int cc, int s,
72 mTarget->dataProcessing(opcode, cc, s, Rd, Rn, Op2);
  /external/llvm/lib/Target/MBlaze/
MBlazeISelLowering.cpp 43 const char *MBlazeTargetLowering::getTargetNodeName(unsigned Opcode) const {
44 switch (Opcode) {
354 // true/false values to select between, and a branch opcode to use.
490 unsigned opcode = 0; local
493 case MBlaze::LAA32: opcode = MBlaze::ADDIK; break;
494 case MBlaze::LAS32: opcode = MBlaze::RSUBIK; break;
495 case MBlaze::LAD32: opcode = MBlaze::AND; break;
496 case MBlaze::LAO32: opcode = MBlaze::OR; break;
497 case MBlaze::LAX32: opcode = MBlaze::XOR; break;
498 case MBlaze::LAN32: opcode = MBlaze::AND; break
    [all...]
  /external/qemu/distrib/sdl-1.2.12/src/video/Xext/XME/
xme.c 232 int opcode, event, error; local
237 if (!XQueryExtension(dpy, XIGMISC_PROTOCOL_NAME, &opcode, &event, &error))
  /sdk/emulator/qtools/
thumbdis.cpp 31 * "decode()" function that maps a thumb instruction to an opcode enum.
42 #include "opcode.h"
48 Opcode opcode; member in struct:thumb_opcode
253 Opcode decode_insn_thumb(uint32_t given)
259 return insn->opcode;

Completed in 1855 milliseconds

<<2122232425262728