| /dalvik/vm/compiler/codegen/arm/armv5te/ |
| ArchVariant.cpp | 75 * EA is calculated by doing "Rn + imm5 << 2". Make sure that the last
|
| /dalvik/vm/compiler/codegen/arm/armv7-a/ |
| ArchVariant.cpp | 70 * EA is calculated by doing "Rn + imm5 << 2". Make sure that the last
|
| /dalvik/vm/compiler/codegen/arm/armv7-a-neon/ |
| ArchVariant.cpp | 70 * EA is calculated by doing "Rn + imm5 << 2". Make sure that the last
|
| /dalvik/vm/compiler/codegen/x86/ia32/ |
| ArchVariant.cpp | 75 * EA is calculated by doing "Rn + imm5 << 2", make sure that the last
|
| /external/llvm/lib/Target/ARM/ |
| ARMInstrThumb.td | 168 // t_addrmode_is4 := reg + imm5 * 4
180 // t_addrmode_is2 := reg + imm5 * 2
192 // t_addrmode_is1 := reg + imm5
575 // Loads: reg/reg and reg/imm5
587 def i : // reg/imm5
593 // Stores: reg/reg and reg/imm5
604 def i : // reg/imm5
909 T1sIGenEncodeImm<{0,1,0,?,?}, (outs tGPR:$Rd), (ins tGPR:$Rm, imm_sr:$imm5),
911 "asr", "\t$Rd, $Rm, $imm5",
912 [(set tGPR:$Rd, (sra tGPR:$Rm, (i32 imm_sr:$imm5)))]> {
[all...] |
| ARMISelDAGToDAG.cpp | [all...] |
| ARMInstrFormats.td | [all...] |
| ARMInstrInfo.td | 436 // {4-0} imm5 shift amount.
437 // asr #32 encoded as imm5 == 0.
[all...] |
| ARMInstrThumb2.td | 35 // {4-0} imm5 shift amount.
[all...] |
| /dalvik/vm/compiler/codegen/arm/armv5te-vfp/ |
| ArchVariant.cpp | 75 * EA is calculated by doing "Rn + imm5 << 2". Make sure that the last
|
| /external/valgrind/main/VEX/priv/ |
| host_arm_defs.h | 256 /* --------- Reg or imm5 operands --------- */
259 ARMri5_I5=9, /* imm5, 1 .. 31 only (no zero!) */
269 UInt imm5; member in struct:__anon11952::__anon11953::__anon11954
278 extern ARMRI5* ARMRI5_I5 ( UInt imm5 );
|
| guest_arm_toIR.c | 8459 UInt regD = 99, regN = 99, regM = 99, imm5 = 99, shift_type = 99; local
8519 UInt regD = 99, regN = 99, shift_type = 99, imm5 = 99, sat_imm = 99; local
8577 UInt regD = 99, regN = 99, shift_type = 99, imm5 = 99, sat_imm = 99; local
11886 UInt imm5 = INSN(11,7); local
12487 UInt imm5 = (insn >> 7) & 0x1F; \/* 11:7 *\/ local
15535 UInt imm5 = INSN0(10,6); local
15562 UInt imm5 = INSN0(10,6); local
15590 UInt imm5 = INSN0(10,6); local
15737 UInt imm5 = INSN0(10,6); local
16310 UInt imm5 = (INSN1(14,12) << 2) | INSN1(7,6); local
16388 UInt imm5 = (INSN1(14,12) << 2) | INSN1(7,6); local
16470 UInt imm5 = (INSN1(14,12) << 2) | INSN1(7,6); local
16559 UInt imm5 = (INSN1(14,12) << 2) | INSN1(7,6); local
16600 UInt imm5 = (INSN1(14,12) << 2) | INSN1(7,6); local
16640 UInt imm5 = (INSN1(14,12) << 2) | INSN1(7,6); local
[all...] |
| host_arm_defs.c | 492 /* --------- Reg or imm5 operands --------- */
494 ARMRI5* ARMRI5_I5 ( UInt imm5 ) {
497 ri5->ARMri5.I5.imm5 = imm5;
498 vassert(imm5 > 0 && imm5 <= 31); // zero is not allowed
511 vex_printf("%u", ri5->ARMri5.I5.imm5);
2593 UInt imm5 = ri->ARMri5.I5.imm5; local
[all...] |
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeInstrFormats.td | 167 bits<5> imm5;
174 let Inst{27-31} = imm5;
|
| /external/llvm/lib/Target/Blackfin/ |
| README.txt | 80 | Ks5 | imm5 | |
|
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMMCCodeEmitter.cpp | [all...] |
| /dalvik/vm/compiler/codegen/arm/ |
| ArmLIR.h | 463 kThumb2Cbnz, /* cbnz rd,<label> [101110] i [1] imm5[7..3]
465 kThumb2Cbz, /* cbn rd,<label> [101100] i [1] imm5[7..3]
[all...] |
| /external/qemu/ |
| arm-dis.c | 2106 long imm5; local
[all...] |
| /external/valgrind/main/none/tests/arm/ |
| v6intThumb.c | [all...] |
| v6intThumb.stdout.exp | [all...] |
| /prebuilt/linux-x86/toolchain/arm-eabi-4.4.0/arm-eabi/bin/ |
| objdump | |
| /prebuilt/linux-x86/toolchain/arm-eabi-4.4.0/bin/ |
| arm-eabi-objdump | |
| /prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/arm-eabi/bin/ |
| objdump | |
| /prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/bin/ |
| arm-eabi-objdump | |
