HomeSort by relevance Sort by last modified time
    Searched full:psllw (Results 1 - 25 of 48) sorted by null

1 2

  /external/libvpx/vp8/encoder/x86/
dct_mmx.asm 73 psllw mm5, 3
74 psllw mm4, 3
76 psllw mm0, 3
77 psllw mm1, 3
dct_sse2.asm 88 psllw xmm0, 3 ;b1 <<= 3 a1 <<= 3
89 psllw xmm3, 3 ;c1 <<= 3 d1 <<= 3
223 psllw xmm5, 3
224 psllw xmm4, 3
226 psllw xmm0, 3
227 psllw xmm1, 3
fwalsh_sse2.asm 48 psllw xmm0, 2 ; d1 a1
49 psllw xmm2, 2 ; c1 b1
  /external/llvm/test/CodeGen/X86/
vshift-1.ll 54 ; CHECK: psllw
66 ; CHECK-NEXT: psllw
vec_shift.ll 1 ; RUN: llc < %s -march=x86 -mattr=+sse2 | grep psllw
vshift-4.ll 61 ; CHECK: psllw
72 ; CHECK: psllw
x86-shifts.ll 65 ; CHECK: psllw
66 ; CHECK-NEXT: psllw
pic-load-remat.ll 1 ; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+sse2 -relocation-model=pic | grep psllw | grep pb
  /external/clang/test/CodeGen/
mmx-builtins.c 301 // CHECK: psllw
341 // CHECK: psllw
  /external/qemu/distrib/sdl-1.2.12/src/video/
mmx.h 592 #define psllw_i2r(imm, reg) mmx_i2r(psllw, imm, reg)
593 #define psllw_m2r(var, reg) mmx_m2r(psllw, var, reg)
594 #define psllw_r2r(regs, regd) mmx_r2r(psllw, regs, regd)
595 #define psllw(vars, vard) mmx_m2m(psllw, vars, vard) macro
SDL_yuv_mmx.c 308 "psllw $3, %%mm5\n" // GREEN 1
330 "psllw $3, %%mm5\n" // GREEN 2
367 "psllw $3, %%mm5\n" // GREEN 3
385 "psllw $3, %%mm0\n" // GREEN 4
  /external/valgrind/main/memcheck/tests/amd64/
sse_memory.stdout.exp     [all...]
sse_memory.c 354 TEST_INSN( &AllMask, 16,psllw)
  /external/valgrind/main/memcheck/tests/x86/
sse2_memory.stdout.exp     [all...]
sse_memory.c 354 TEST_INSN( &AllMask, 16,psllw)
  /external/libvpx/vp8/common/x86/
loopfilter_mmx.asm     [all...]
loopfilter_sse2.asm     [all...]
postproc_sse2.asm 67 psllw xmm3, 2 ;
156 psllw xmm3, 2
postproc_mmx.c 447 psllw xmm3, 2 ;
580 psllw xmm3, 2
    [all...]
  /external/valgrind/main/none/tests/amd64/
insn_mmx.def 78 psllw imm8[4] mm.uw[0x0123,0x4567,0x89ab,0xcdef] => 1.uw[0x1230,0x5670,0x9ab0,0xdef0]
79 psllw mm.uq[4] mm.uw[0x0123,0x4567,0x89ab,0xcdef] => 1.uw[0x1230,0x5670,0x9ab0,0xdef0]
80 psllw m64.uq[4] mm.uw[0x0123,0x4567,0x89ab,0xcdef] => 1.uw[0x1230,0x5670,0x9ab0,0xdef0]
insn_sse2.def 251 psllw imm8[4] xmm.uw[0x0123,0x4567,0x89ab,0xcdef,0x0123,0x4567,0x89ab,0xcdef] => 1.uw[0x1230,0x5670,0x9ab0,0xdef0,0x1230,0x5670,0x9ab0,0xdef0]
252 psllw xmm.uq[4,0] xmm.uw[0x0123,0x4567,0x89ab,0xcdef,0x0123,0x4567,0x89ab,0xcdef] => 1.uw[0x1230,0x5670,0x9ab0,0xdef0,0x1230,0x5670,0x9ab0,0xdef0]
253 psllw m128.uq[4,0] xmm.uw[0x0123,0x4567,0x89ab,0xcdef,0x0123,0x4567,0x89ab,0xcdef] => 1.uw[0x1230,0x5670,0x9ab0,0xdef0,0x1230,0x5670,0x9ab0,0xdef0]
    [all...]
  /external/valgrind/main/none/tests/x86/
insn_mmx.def 58 psllw imm8[4] mm.uw[0x0123,0x4567,0x89ab,0xcdef] => 1.uw[0x1230,0x5670,0x9ab0,0xdef0]
59 psllw mm.uq[4] mm.uw[0x0123,0x4567,0x89ab,0xcdef] => 1.uw[0x1230,0x5670,0x9ab0,0xdef0]
60 psllw m64.uq[4] mm.uw[0x0123,0x4567,0x89ab,0xcdef] => 1.uw[0x1230,0x5670,0x9ab0,0xdef0]
  /external/llvm/test/MC/X86/
x86-32-coverage.s 686 // CHECK: psllw %mm3, %mm3
687 psllw %mm3,%mm3
689 // CHECK: psllw %xmm5, %xmm5
690 psllw %xmm5,%xmm5
692 // CHECK: psllw $127, %mm3
693 psllw $0x7f,%mm3
695 // CHECK: psllw $127, %xmm5
696 psllw $0x7f,%xmm5
    [all...]
  /external/qemu/target-i386/
ops_sse_header.h 40 DEF_HELPER_2(glue(psllw, SUFFIX), void, Reg, Reg)
  /external/libvpx/vpx_scale/win32/
scaleopt.c     [all...]

Completed in 519 milliseconds

1 2