| /external/openssl/crypto/aes/asm/ |
| aes-sparcv9.pl | 197 srl $rounds,1,$rounds
200 srl $s0,21,$acc0
203 srl $s1,13,$acc1 !
212 srl $s2,5,$acc2 !
218 srl $s1,21,$acc4
221 srl $s2,13,$acc5
224 srl $s3,5,$acc6
231 srl $s2,21,$acc8
234 srl $s3,13,$acc9
237 srl $s0,5,$acc1
[all...] |
| /external/openssl/crypto/des/asm/ |
| des_enc.m4 | 153 srl $2, 4, local4
168 srl $1, 16, local4
182 srl $2, 2, local4
194 srl $1, 8, local4
207 srl $2, 1, local4
227 srl $1, 29, local4
230 srl $2, 29, local1
321 srl out1, 4, local0 ! rotate 4 right
326 srl local3, 8, local3 ! 3
335 srl out0, 24, local1 !
[all...] |
| /external/icu4c/extra/uconv/ |
| README | 7 resource bundle. Please contact Steven Loomis <srl@jtcsv.com> if you
|
| /external/llvm/test/MC/Disassembler/MBlaze/ |
| mblaze_shift.txt | 28 # CHECK: srl r1, r2
|
| /external/llvm/test/MC/MBlaze/ |
| mblaze_shift.s | 44 # CHECK: srl
47 srl r1, r2
|
| /external/openssl/crypto/sha/asm/ |
| sha1-sparcv9a.pl | 154 srl $a,27,$tmp1
162 srl $b,2,$b
173 srl $a,27,$tmp1
182 srl $b,2,$b
206 srl $a,27,$tmp1
214 srl $b,2,$b
224 srl $a,27,$tmp1
233 srl $b,2,$b
244 srl $a,27,$tmp1
251 srl $b,2,$
[all...] |
| sha512-sparcv9.pl | 59 $SRL="srlx"; # shift right logical
85 $SRL="srl"; # shift right logical
222 $SRL $e,@Sigma1[0],$h !! $i
226 $SRL $e,@Sigma1[1],$tmp0
230 $SRL $e,@Sigma1[2],$tmp0
237 $SRL $a,@Sigma0[0],$h
242 $SRL $a,@Sigma0[1],$tmp0
246 $SRL $a,@Sigma0[2],$tmp0
276 srl $xi,@sigma0[0],$T1 !! Xupdate($i
[all...] |
| sha1-sparcv9.pl | 59 srl $a,27,$tmp1
65 srl $b,2,$b
87 srl $a,27,$tmp1
103 srl $a,27,$tmp1 !!
126 srl $b,2,$b
149 srl $b,2,$b
172 srl $b,2,$b
|
| /external/icu4c/test/testmap/ |
| testmap.c | 12 * 4/26/2000 srl created
|
| /external/llvm/test/CodeGen/Blackfin/ |
| promote-setcc.ll | 12 ; Case (srl (ctlz x), 5) == const
|
| /external/icu4c/i18n/ |
| taiwncal.cpp | 10 * 05/13/2003 srl copied from gregocal.cpp
11 * 06/29/2007 srl copied from buddhcal.cpp
|
| taiwncal.h | 12 * 05/13/2003 srl copied from gregocal.h
13 * 06/29/2007 srl copied from buddhcal.h
|
| /external/icu4c/samples/msgfmt/ |
| README.TXT | 44 - Build and install ICU with a prefix, for example '--prefix=/home/srl/ICU'
45 - Set the variable ICU_PREFIX=/home/srl/ICU and use GNU make in
|
| /external/libffi/src/mips/ |
| n32.S | 119 SRL t4, t6, 1*FFI_FLAG_BITS
132 SRL t4, t6, 2*FFI_FLAG_BITS
145 SRL t4, t6, 3*FFI_FLAG_BITS
158 SRL t4, t6, 4*FFI_FLAG_BITS
171 SRL t4, t6, 5*FFI_FLAG_BITS
184 SRL t4, t6, 6*FFI_FLAG_BITS
197 SRL t4, t6, 7*FFI_FLAG_BITS
219 SRL t6, 8*FFI_FLAG_BITS
|
| ffitarget.h | 128 # define SRL srl
135 # define SRL dsrl
|
| /external/icu4c/config/ |
| test-icu-config.sh | 47 icu-config --prefix=/Users/srl/II --cflags
|
| /external/llvm/lib/Target/X86/ |
| X86InstrShiftRotate.td | 113 [(set GR8:$dst, (srl GR8:$src1, CL))]>;
116 [(set GR16:$dst, (srl GR16:$src1, CL))]>, OpSize;
119 [(set GR32:$dst, (srl GR32:$src1, CL))]>;
122 [(set GR64:$dst, (srl GR64:$src1, CL))]>;
127 [(set GR8:$dst, (srl GR8:$src1, (i8 imm:$src2)))]>;
130 [(set GR16:$dst, (srl GR16:$src1, (i8 imm:$src2)))]>, OpSize;
133 [(set GR32:$dst, (srl GR32:$src1, (i8 imm:$src2)))]>;
136 [(set GR64:$dst, (srl GR64:$src1, (i8 imm:$src2)))]>;
141 [(set GR8:$dst, (srl GR8:$src1, (i8 1)))]>;
144 [(set GR16:$dst, (srl GR16:$src1, (i8 1)))]>, OpSize
[all...] |
| /external/icu4c/common/unicode/ |
| ptypes.h | 16 * 09/18/08 srl Moved basic types back to ptypes.h from platform.h
|
| /external/icu4c/samples/udata/ |
| readme.txt | 45 You will need to set ICU_PATH to the location of your ICU source tree, for example ICU_PATH=/home/srl/icu (containing source, etc.)
|
| /external/llvm/lib/Target/ARM/ |
| ARMSelectionDAGInfo.h | 27 case ISD::SRL: return ARM_AM::lsr;
|
| /external/icu4c/samples/datefmt/ |
| README.TXT | 35 - Build and install ICU with a prefix, for example '--prefix=/home/srl/ICU'
36 - Set the variable ICU_PREFIX=/home/srl/ICU and use GNU make in
|
| /external/icu4c/samples/translit/ |
| README.TXT | 42 - Build and install ICU with a prefix, for example '--prefix=/home/srl/ICU'
43 - Set the variable ICU_PREFIX=/home/srl/ICU and use GNU make in
|
| /external/neven/Embedded/common/src/b_TensorEm/ |
| CompactMat.c | 222 uint32 srL = bitsL;
225 if( srL > 16 )
228 srL -= 16;
230 sumL += ( ( int16 )( ( bfL >> srL ) & mkL ) * ( int32 )inPtrL[ iL ] ) >> adjL;
231 srL += bitsL;
294 uint32 srL = bitsL;
299 if( srL > 16 )
302 srL -= 16;
304 sumL += ( ( int16 )( ( bfL >> srL ) & mkL ) * ( int32 )inPtrL[ iL ] + lRoundL ) >> lAdjL;
305 srL += bitsL
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| DAGCombiner.cpp | 839 else if (Opc == ISD::SRL)
[all...] |
| /external/llvm/lib/Target/Mips/ |
| Mips64InstrInfo.td | 85 def DSRL : shift_rotate_imm64<0x3a, 0x00, "dsrl", srl>;
88 def DSRL32 : shift_rotate_imm64_32<0x3e, 0x00, "dsrl32", srl>;
91 def DSRLV : shift_rotate_reg<0x26, 0x00, "dsrlv", srl, CPU64Regs>;
|
