Lines Matching refs:LR
212 void RAFast::addKillFlag(const LiveReg &LR) {
213 if (!LR.LastUse) return;
214 MachineOperand &MO = LR.LastUse->getOperand(LR.LastOpNum);
215 if (MO.isUse() && !LR.LastUse->isRegTiedToDefOperand(LR.LastOpNum)) {
216 if (MO.getReg() == LR.PhysReg)
219 LR.LastUse->addRegisterKilled(LR.PhysReg, TRI, true);
226 const LiveReg &LR = LRI->second;
227 assert(PhysRegState[LR.PhysReg] == LRI->first && "Broken RegState mapping");
228 PhysRegState[LR.PhysReg] = regFree;
256 LiveReg &LR = LRI->second;
257 assert(PhysRegState[LR.PhysReg] == LRI->first && "Broken RegState mapping");
259 if (LR.Dirty) {
262 bool SpillKill = LR.LastUse != MI;
263 LR.Dirty = false;
265 << " in " << PrintReg(LR.PhysReg, TRI));
269 TII->storeRegToStackSlot(*MBB, MI, LR.PhysReg, SpillKill, FI, RC, TRI);
302 LR.LastUse = 0; // Don't kill register again
548 LiveReg &LR = LRI->second;
559 } else if (LR.LastUse) {
562 if (LR.LastUse != MI || LR.LastUse->getOperand(LR.LastOpNum).isUse())
563 addKillFlag(LR);
565 assert(LR.PhysReg && "Register not assigned");
566 LR.LastUse = MI;
567 LR.LastOpNum = OpNum;
568 LR.Dirty = true;
569 UsedInInstr.set(LR.PhysReg);
582 LiveReg &LR = LRI->second;
589 << PrintReg(LR.PhysReg, TRI) << "\n");
590 TII->loadRegFromStackSlot(*MBB, MI, LR.PhysReg, FrameIndex, RC, TRI);
592 } else if (LR.Dirty) {
617 assert(LR.PhysReg && "Register not assigned");
618 LR.LastUse = MI;
619 LR.LastOpNum = OpNum;
620 UsedInInstr.set(LR.PhysReg);
