Lines Matching refs:Order
418 // Everything is allocated in long->short order. Long ranges that don't fit
445 AllocationOrder &Order,
447 Order.rewind();
449 while ((PhysReg = Order.next()))
452 if (!PhysReg || Order.isHint(PhysReg))
460 if (Order.isHint(Hint)) {
478 unsigned CheapReg = tryEvict(VirtReg, Order, NewVRegs, Cost);
488 /// eviction policy defined by this function together with the allocation order
611 /// @param Order Physregs to try.
614 AllocationOrder &Order,
630 Order.rewind();
631 while (unsigned PhysReg = Order.next()) {
651 if (Order.isHint(PhysReg))
1085 unsigned RAGreedy::tryRegionSplit(LiveInterval &VirtReg, AllocationOrder &Order,
1105 Order.rewind();
1106 while (unsigned PhysReg = Order.next()) {
1218 unsigned RAGreedy::tryBlockSplit(LiveInterval &VirtReg, AllocationOrder &Order,
1263 /// in order to use PhysReg between two entries in SA->UseSlots.
1320 unsigned RAGreedy::tryLocalSplit(LiveInterval &VirtReg, AllocationOrder &Order,
1372 Order.rewind();
1373 while (unsigned PhysReg = Order.next()) {
1375 // order to make use of PhysReg between UseSlots[i] and UseSlots[i+1].
1508 unsigned RAGreedy::trySplit(LiveInterval &VirtReg, AllocationOrder &Order,
1518 return tryLocalSplit(VirtReg, Order, NewVRegs);
1532 if (unsigned PhysReg = tryAssign(VirtReg, Order, NewVRegs))
1540 unsigned PhysReg = tryRegionSplit(VirtReg, Order, NewVRegs);
1546 return tryBlockSplit(VirtReg, Order, NewVRegs);
1557 AllocationOrder Order(VirtReg.reg, *VRM, RegClassInfo);
1558 if (unsigned PhysReg = tryAssign(VirtReg, Order, NewVRegs))
1569 if (unsigned PhysReg = tryEvict(VirtReg, Order, NewVRegs))
1590 unsigned PhysReg = trySplit(VirtReg, Order, NewVRegs);
