Lines Matching refs:SuccSU
950 SUnit *SuccSU = I->getSUnit();
951 if (SuccSU->isScheduled) {
954 AddPred(SuccSU, D);
956 DelDeps.push_back(std::make_pair(SuccSU, D));
990 SUnit *SuccSU = I->getSUnit();
991 if (SuccSU->isScheduled) {
994 AddPred(SuccSU, D);
995 DelDeps.push_back(std::make_pair(SuccSU, *I));
1004 AddPred(SuccSU, D);
1314 SUnit *SuccSU = SuccEdge->getSUnit();
1317 if (SuccSU->NumPredsLeft == 0) {
1319 SuccSU->dump(this);
1324 --SuccSU->NumPredsLeft;
1328 if (SuccSU->NumPredsLeft == 0 && SuccSU != &ExitSU) {
1329 SuccSU->isAvailable = true;
1330 AvailableQueue->push(SuccSU);
2137 const SUnit *SuccSU = I->getSUnit();
2138 if (SuccSU->getNode() && SuccSU->getNode()->getOpcode() == ISD::CopyToReg) {
2140 cast<RegisterSDNode>(SuccSU->getNode()->getOperand(1))->getReg();
2638 SUnit *SuccSU = SI->getSUnit();
2639 for (SUnit::const_pred_iterator PI = SuccSU->Preds.begin(),
2640 PE = SuccSU->Preds.end(); PI != PE; ++PI) {
2657 /// canClobberPhysRegDefs - True if SU would clobber one of SuccSU's
2659 static bool canClobberPhysRegDefs(const SUnit *SuccSU, const SUnit *SU,
2662 SDNode *N = SuccSU->getNode();
2793 SUnit *SuccSU = Edge.getSUnit();
2794 if (SuccSU != SU) {
2796 scheduleDAG->RemovePred(SuccSU, Edge);
2799 scheduleDAG->AddPred(SuccSU, Edge);
2840 SUnit *SuccSU = I->getSUnit();
2841 if (SuccSU == SU)
2845 if (SuccSU->getHeight() < SU->getHeight() &&
2846 (SU->getHeight() - SuccSU->getHeight()) > 1)
2852 while (SuccSU->Succs.size() == 1 &&
2853 SuccSU->getNode()->isMachineOpcode() &&
2854 SuccSU->getNode()->getMachineOpcode() ==
2856 SuccSU = SuccSU->Succs.front().getSUnit();
2858 if (!SuccSU->getNode() || !SuccSU->getNode()->isMachineOpcode())
2862 if (SuccSU->hasPhysRegDefs && SU->hasPhysRegClobbers) {
2863 if (canClobberPhysRegDefs(SuccSU, SU, TII, TRI))
2868 unsigned SuccOpc = SuccSU->getNode()->getMachineOpcode();
2873 if (!canClobberReachingPhysRegUse(SuccSU, SU, scheduleDAG, TII, TRI) &&
2874 (!canClobber(SuccSU, DUSU) ||
2875 (isLiveOut && !hasOnlyLiveOutUses(SuccSU)) ||
2876 (!SU->isCommutable && SuccSU->isCommutable)) &&
2877 !scheduleDAG->IsReachable(SuccSU, SU)) {
2879 << SU->NodeNum << " to SU #" << SuccSU->NodeNum << "\n");
2880 scheduleDAG->AddPred(SU, SDep(SuccSU, SDep::Order, /*Latency=*/0,
2898 const SUnit *SuccSU = I->getSUnit();
2899 for (SUnit::const_pred_iterator II = SuccSU->Preds.begin(),
2900 EE = SuccSU->Preds.end(); II != EE; ++II) {
