Lines Matching refs:OpInfo
5683 /// OpInfo describes the operand.
5689 SDISelAsmOperandInfo &OpInfo,
5698 switch (OpInfo.Type) {
5704 isInReg = OpInfo.hasMatchingInput();
5723 TLI.getRegForInlineAsmConstraint(OpInfo.ConstraintCode,
5724 OpInfo.ConstraintVT);
5727 if (OpInfo.ConstraintVT != MVT::Other) {
5731 if (OpInfo.Type == InlineAsm::isInput &&
5732 PhysReg.second && !PhysReg.second->hasType(OpInfo.ConstraintVT)) {
5737 if (RegVT.getSizeInBits() == OpInfo.ConstraintVT.getSizeInBits()) {
5738 OpInfo.CallOperand = DAG.getNode(ISD::BITCAST, DL,
5739 RegVT, OpInfo.CallOperand);
5740 OpInfo.ConstraintVT = RegVT;
5741 } else if (RegVT.isInteger() && OpInfo.ConstraintVT.isFloatingPoint()) {
5747 OpInfo.ConstraintVT.getSizeInBits());
5748 OpInfo.CallOperand = DAG.getNode(ISD::BITCAST, DL,
5749 RegVT, OpInfo.CallOperand);
5750 OpInfo.ConstraintVT = RegVT;
5754 NumRegs = TLI.getNumRegisters(Context, OpInfo.ConstraintVT);
5758 EVT ValueVT = OpInfo.ConstraintVT;
5764 if (OpInfo.ConstraintVT == MVT::Other)
5789 OpInfo.AssignedRegs = RegsForValue(Regs, RegVT, ValueVT);
5791 OpInfo.MarkAllocatedRegs(isOutReg, isInReg, OutputRegs, InputRegs, *TRI);
5799 if (OpInfo.ConstraintVT == MVT::Other)
5807 OpInfo.AssignedRegs = RegsForValue(Regs, RegVT, ValueVT);
5833 SDISelAsmOperandInfo &OpInfo = ConstraintOperands.back();
5838 switch (OpInfo.Type) {
5841 if (OpInfo.isIndirect) {
5842 OpInfo.CallOperandVal = const_cast<Value *>(CS.getArgument(ArgNo++));
5858 OpInfo.CallOperandVal = const_cast<Value *>(CS.getArgument(ArgNo++));
5867 if (OpInfo.CallOperandVal) {
5868 if (const BasicBlock *BB = dyn_cast<BasicBlock>(OpInfo.CallOperandVal)) {
5869 OpInfo.CallOperand = DAG.getBasicBlock(FuncInfo.MBBMap[BB]);
5871 OpInfo.CallOperand = getValue(OpInfo.CallOperandVal);
5874 OpVT = OpInfo.getCallOperandValEVT(*DAG.getContext(), TLI, TD);
5877 OpInfo.ConstraintVT = OpVT;
5880 if (OpInfo.isIndirect)
5883 for (unsigned j = 0, ee = OpInfo.Codes.size(); j != ee; ++j) {
5885 CType = TLI.getConstraintType(OpInfo.Codes[j]);
5906 SDISelAsmOperandInfo &OpInfo = ConstraintOperands[i];
5912 if (OpInfo.hasMatchingInput()) {
5913 SDISelAsmOperandInfo &Input = ConstraintOperands[OpInfo.MatchingInput];
5915 if (OpInfo.ConstraintVT != Input.ConstraintVT) {
5917 TLI.getRegForInlineAsmConstraint(OpInfo.ConstraintCode,
5918 OpInfo.ConstraintVT);
5922 if ((OpInfo.ConstraintVT.isInteger() !=
5929 Input.ConstraintVT = OpInfo.ConstraintVT;
5934 TLI.ComputeConstraintToUse(OpInfo, OpInfo.CallOperand, &DAG);
5938 if (OpInfo.ConstraintType == TargetLowering::C_Memory &&
5939 !OpInfo.isIndirect) {
5940 assert((OpInfo.isMultipleAlternative ||
5941 (OpInfo.Type == InlineAsm::isInput)) &&
5954 const Value *OpVal = OpInfo.CallOperandVal;
5957 OpInfo.CallOperand = DAG.getConstantPool(cast<Constant>(OpVal),
5969 OpInfo.CallOperand, StackSlot,
5972 OpInfo.CallOperand = StackSlot;
5976 OpInfo.CallOperandVal = 0;
5979 OpInfo.isIndirect = true;
5984 if (OpInfo.ConstraintType == TargetLowering::C_Register)
5985 GetRegistersForValue(DAG, TLI, getCurDebugLoc(), OpInfo, OutputRegs,
5992 SDISelAsmOperandInfo &OpInfo = ConstraintOperands[i];
5996 if (OpInfo.ConstraintType == TargetLowering::C_RegisterClass)
5997 GetRegistersForValue(DAG, TLI, getCurDebugLoc(), OpInfo, OutputRegs,
6031 SDISelAsmOperandInfo &OpInfo = ConstraintOperands[i];
6033 switch (OpInfo.Type) {
6035 if (OpInfo.ConstraintType != TargetLowering::C_RegisterClass &&
6036 OpInfo.ConstraintType != TargetLowering::C_Register) {
6038 assert(OpInfo.isIndirect && "Memory output must be indirect operand");
6044 AsmNodeOperands.push_back(OpInfo.CallOperand);
6052 if (OpInfo.AssignedRegs.Regs.empty())
6054 Twine(OpInfo.ConstraintCode) + "'!");
6058 if (OpInfo.isIndirect) {
6059 IndirectStoresToEmit.push_back(std::make_pair(OpInfo.AssignedRegs,
6060 OpInfo.CallOperandVal));
6065 RetValRegs.append(OpInfo.AssignedRegs);
6070 OpInfo.AssignedRegs.AddInlineAsmOperands(OpInfo.isEarlyClobber ?
6080 SDValue InOperandVal = OpInfo.CallOperand;
6082 if (OpInfo.isMatchingInputConstraint()) { // Matching constraint?
6085 unsigned OperandNo = OpInfo.getMatchedOperand();
6105 if (OpInfo.isIndirect) {
6127 true, OpInfo.getMatchedOperand(),
6138 OpInfo.getMatchedOperand());
6146 if (OpInfo.ConstraintType == TargetLowering::C_Other &&
6147 OpInfo.isIndirect)
6148 OpInfo.ConstraintType = TargetLowering::C_Memory;
6150 if (OpInfo.ConstraintType == TargetLowering::C_Other) {
6152 TLI.LowerAsmOperandForConstraint(InOperandVal, OpInfo.ConstraintCode,
6156 Twine(OpInfo.ConstraintCode) + "'!");
6167 if (OpInfo.ConstraintType == TargetLowering::C_Memory) {
6168 assert(OpInfo.isIndirect && "Operand must be indirect to be a mem!");
6180 assert((OpInfo.ConstraintType == TargetLowering::C_RegisterClass ||
6181 OpInfo.ConstraintType == TargetLowering::C_Register) &&
6183 assert(!OpInfo.isIndirect &&
6187 if (OpInfo.AssignedRegs.Regs.empty())
6189 Twine(OpInfo.ConstraintCode) + "'!");
6191 OpInfo
6194 OpInfo.AssignedRegs.AddInlineAsmOperands(InlineAsm::Kind_RegUse, false, 0,
6201 if (!OpInfo.AssignedRegs.Regs.empty())
6202 OpInfo.AssignedRegs.AddInlineAsmOperands(InlineAsm::Kind_Clobber,
