Lines Matching defs:pit
88 /* get pit output bit */
120 int pit_get_out(PITState *pit, int channel, int64_t current_time)
122 PITChannelState *s = &pit->channels[channel];
178 void pit_set_gate(PITState *pit, int channel, int val)
180 PITChannelState *s = &pit->channels[channel];
209 int pit_get_gate(PITState *pit, int channel)
211 PITChannelState *s = &pit->channels[channel];
215 int pit_get_initial_count(PITState *pit, int channel)
217 PITChannelState *s = &pit->channels[channel];
221 int pit_get_mode(PITState *pit, int channel)
223 PITChannelState *s = &pit->channels[channel];
247 PITState *pit = opaque;
257 s = &pit->channels[channel];
274 s = &pit->channels[channel];
289 s = &pit->channels[addr];
312 PITState *pit = opaque;
317 s = &pit->channels[addr];
394 PITState *pit = opaque;
399 s = &pit->channels[i];
422 PITState *pit = opaque;
430 s = &pit->channels[i];
454 PITState *pit = opaque;
459 s = &pit->channels[i];
480 PITState *pit = &pit_state;
482 s = &pit->channels[0];
490 PITState *pit = &pit_state;
493 s = &pit->channels[0];
498 register_savevm("i8254", base, 1, pit_save, pit_load, pit);
500 qemu_register_reset(pit_reset, 0, pit);
501 register_ioport_write(base, 4, 1, pit_ioport_write, pit);
502 register_ioport_read(base, 3, 1, pit_ioport_read, pit);
504 pit_reset(pit);
506 return pit;
