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Lines Matching refs:pc

129   Instr* pc = reinterpret_cast<Instr*>(pc_);
132 *(pc + i) = *(instr + i);
140 // Patch the code at the current PC with a call to the target address.
234 // mov lr, pc
235 const Instr kMovLrPc = al | MOV | pc.code() | lr.code() * B12;
236 // ldr rd, [pc, #offset]
238 const Instr kLdrPCPattern = al | 5 * B24 | L | pc.code() * B16;
488 // ldr<cond> <Rd>, [pc +/- offset_12].
825 // condition code), then replace it with a 'ldr rd, [pc]'.
832 ldr(rd, MemOperand(pc, 0), cond);
846 ldr(ip, MemOperand(pc, 0), cond);
858 ASSERT(!rn.is(pc) && !rd.is(pc) && !x.rm_.is(pc) && !x.rs_.is(pc));
862 if (rn.is(pc) || x.rm_.is(pc)) {
863 // Block constant pool emission for one instruction after reading pc.
893 ASSERT(!x.rm_.is(pc));
896 ASSERT((am & (P|W)) == P || !x.rn_.is(pc)); // no pc base with writeback
932 ASSERT((am & (P|W)) == P || !x.rm_.is(pc)); // no pc index with writeback
935 ASSERT((am & (P|W)) == P || !x.rn_.is(pc)); // no pc base with writeback
943 ASSERT(!rn.is(pc));
962 ASSERT((am & (P|W)) == P || !x.rn_.is(pc)); // no pc base with writeback
987 // be emitted at the pc offset recorded by the label.
1044 ASSERT(!target.is(pc));
1051 ASSERT(!target.is(pc)); // use of pc is actually allowed, but discouraged
1154 if (dst.is(pc)) {
1190 ASSERT(!dst.is(pc) && !src1.is(pc) && !src2.is(pc) && !srcA.is(pc));
1198 ASSERT(!dst.is(pc) && !src1.is(pc) && !src2.is(pc));
1210 ASSERT(!dstL.is(pc) && !dstH.is(pc) && !src1.is(pc) && !src2.is(pc));
1223 ASSERT(!dstL.is(pc) && !dstH.is(pc) && !src1.is(pc) && !src2.is(pc));
1236 ASSERT(!dstL.is(pc) && !dstH.is(pc) && !src1.is(pc) && !src2.is(pc));
1249 ASSERT(!dstL.is(pc) && !dstH.is(pc) && !src1.is(pc) && !src2.is(pc));
1259 ASSERT(!dst.is(pc) && !src.is(pc));
1274 ASSERT(!dst.is(pc) && !src.rm_.is(pc));
1302 ASSERT(!dst.is(pc) && !src.is(pc));
1322 ASSERT(!dst.is(pc) && !src.is(pc));
1337 ASSERT(!dst.is(pc));
1356 ASSERT(!dst.is(pc) && !src.is(pc));
1367 ASSERT(!dst.is(pc));
1384 ldr(ip, MemOperand(pc, 0), cond);
1399 if (dst.is(pc)) {
1656 // Emit the constant pool after a function return implemented by ldm ..{..pc}.
1657 if (cond == al && (dst & pc.bit()) != 0) {
1661 // at the pc of the ldm instruction by a mov lr, pc instruction; if this is
2012 ASSERT(!base.is(pc));
2033 ASSERT(!base.is(pc));
2053 ASSERT(!base.is(pc));
2074 ASSERT(!base.is(pc));
2212 ASSERT(!src1.is(pc) && !src2.is(pc));
2227 ASSERT(!dst1.is(pc) && !dst2.is(pc));
2241 ASSERT(!src.is(pc));
2256 ASSERT(!dst.is(pc));
2576 ASSERT(0 <= type && type <= 14); // mov pc, pc is not a nop.
2583 ASSERT(0 <= type && type <= 14); // mov pcpc is not a nop.
2658 // None of our relocation types are pc relative pointing outside the code
2659 // buffer nor pc absolute pointing inside the code buffer, so there is no need
2668 rinfo.set_pc(rinfo.pc() + pc_delta);
2807 Instr instr = instr_at(rinfo.pc());
2809 // Instruction to patch must be a ldr/str [pc, #offset].
2810 // P and U set, B and W clear, Rn == pc, offset12 still 0.
2812 (2*B25 | P | U | pc.code()*B16));
2813 int delta = pc_ - rinfo.pc() - 8;
2814 ASSERT(delta >= -4); // instr could be ldr pc, [pc, #-4] followed by targ32
2820 instr_at_put(rinfo.pc(), instr + delta);