Cross Reference: /external/v8/src/mips/assembler-mips.cc

Lines Matching refs:lui
146   // specially coded on MIPS means that it is a lui/ori instruction, and that is
1267   lui(at, src.offset_ >> kLuiShift);
1438 void Assembler::lui(Register rd, int32_t j) {
1439   GenInstrImmediate(LUI, zero_reg, rd, j);
2021   ASSERT(((instr1 & kOpcodeMask) == LUI && (instr2 & kOpcodeMask) == ORI) ||
2024                             (instr2 & kOpcodeMask) == LUI)));
2031     } else if ((instr2 & kOpcodeMask) == LUI) {
2034   } else if ((instr1 & kOpcodeMask) == LUI && (instr2 & kOpcodeMask) == ORI) {
2055   CHECK(((instr1 & kOpcodeMask) == LUI && (instr2 & kOpcodeMask) == ORI) ||
2058                            (instr2 & kOpcodeMask)== LUI)));
2077     // lui rt (kHiMask & itarget) >> kLuiShift.
2079     *(p+1) = LUI | rt_code | ((itarget & kHiMask) >> kLuiShift);
2081     // lui rt (kHiMask & itarget) >> kLuiShift.
2083     *p = LUI | rt_code | ((itarget & kHiMask) >> kLuiShift);
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