Lines Matching refs:VG_
185 c->line_size_bits = VG_(log2)(c->line_size);
186 c->tag_shift = c->line_size_bits + VG_(log2)(c->sets);
194 VG_(sprintf)(c->desc_line, "%d B, %d B, direct-mapped%s",
198 VG_(sprintf)(c->desc_line, "%d B, %d B, %d-way associative%s",
221 VG_(printf)("%8x ", c->tags[i]);
223 VG_(printf)("\n");
298 VG_(printf)("addr: %lx size: %u sets: %d %d", a, size, set1, set2);
299 VG_(tool_panic)("item straddles more than two cache sets");
404 VG_(printf)("addr: %lx size: %u sets: %d %d", a, size, set1, set2);
405 VG_(tool_panic)("item straddles more than two cache sets");
664 VG_(message)(Vg_DebugMsg,
667 VG_(tool_panic)("Unsupported cache configuration");
815 VG_(printf)("addr: %#lx size: %u sets: %d %d", a, size, set1, set2); \
816 VG_(tool_panic)("item straddles more than two cache sets"); \
1280 (-1 == VG_(log2)(cache->size/cache->line_size/cache->assoc)))
1286 if (-1 == VG_(log2)(cache->line_size)) {
1324 VG_(configure_caches)( I1c, D1c, LLc, all_caches_clo_defined );
1336 if (VG_(clo_verbosity) > 1) {
1337 VG_(umsg)("Cache configuration used:\n");
1338 VG_(umsg)(" I1: %dB, %d-way, %dB lines\n",
1340 VG_(umsg)(" D1: %dB, %d-way, %dB lines\n",
1342 VG_(umsg)(" LL: %dB, %d-way, %dB lines\n",
1411 VG_(message)(Vg_DebugMsg,
1418 VG_(message)(Vg_DebugMsg,
1475 p = VG_(sprintf)(buf, "\ndesc: I1 cache: %s\n", I1.desc_line);
1476 p += VG_(sprintf)(buf+p, "desc: D1 cache: %s\n", D1.desc_line);
1477 VG_(sprintf)(buf+p, "desc: LL cache: %s\n", LL.desc_line);
1483 VG_(printf)(
1505 i1 = VG_(strtoll10)(optval, &endptr); if (*endptr != ',') goto bad;
1506 i2 = VG_(strtoll10)(endptr+1, &endptr); if (*endptr != ',') goto bad;
1507 i3 = VG_(strtoll10)(endptr+1, &endptr); if (*endptr != '\0') goto bad;
1519 VG_(fmsg)("%s", checkRes);
1526 VG_(fmsg_bad_option)(opt, "");
1529 VG_(fmsg_bad_option)(opt,
1573 VG_(sprintf)(buf, "%llu", n);
1574 len = VG_(strlen)(buf);
1603 VG_(sprintf)(buf, "%d.%d%%", n / ex, n % ex);
1604 len = VG_(strlen)(buf);
1625 if ((VG_(clo_verbosity) >1) && clo_simulate_hwpref) {
1626 VG_(message)(Vg_DebugMsg, "Prefetch Up: %llu\n",
1628 VG_(message)(Vg_DebugMsg, "Prefetch Down: %llu\n",
1630 VG_(message)(Vg_DebugMsg, "\n");
1634 VG_(message)(Vg_UserMsg, "I1 misses: %s\n", buf1);
1637 VG_(message)(Vg_UserMsg, "LLi misses: %s\n", buf1);
1646 VG_(message)(Vg_UserMsg, "I1 miss rate: %s\n", buf1);
1650 VG_(message)(Vg_UserMsg, "LLi miss rate: %s\n", buf1);
1651 VG_(message)(Vg_UserMsg, "\n");
1666 VG_(message)(Vg_UserMsg, "D refs: %s (%s rd + %s wr)\n",
1672 VG_(message)(Vg_UserMsg, "D1 misses: %s (%s rd + %s wr)\n",
1678 VG_(message)(Vg_UserMsg, "LLd misses: %s (%s rd + %s wr)\n",
1692 VG_(message)(Vg_UserMsg, "D1 miss rate: %s (%s + %s )\n",
1700 VG_(message)(Vg_UserMsg, "LLd miss rate: %s (%s + %s )\n",
1702 VG_(message)(Vg_UserMsg, "\n");
1719 VG_(message)(Vg_UserMsg, "LL refs: %s (%s rd + %s wr)\n",
1733 VG_(message)(Vg_UserMsg, "LL misses: %s (%s rd + %s wr)\n",
1743 VG_(message)(Vg_UserMsg, "LL miss rate: %s (%s + %s )\n",
