| /external/v8/src/mips/ |
| assembler-mips.cc | 382 return opcode == BEQ ||
872 beq(zero_reg, zero_reg, offset);
882 void Assembler::beq(Register rs, Register rt, int16_t offset) { function in class:v8::internal::Assembler
884 GenInstrImmediate(BEQ, rs, rt, offset);
[all...] |
| assembler-mips.h | 558 void beq(Register rs, Register rt, int16_t offset);
559 void beq(Register rs, Register rt, Label* L) { function in class:v8::internal::Assembler
560 beq(rs, rt, branch_offset(L, false) >> 2);
[all...] |
| /external/webkit/Source/JavaScriptCore/assembler/ |
| MIPSAssembler.h | 485 void beq(RegisterID rs, RegisterID rt, int imm) function in class:JSC::MIPSAssembler
863 ASSERT((*insn & 0xfc000000) == 0x10000000 // beq
873 beq $2, $3, target
899 Note: beq/bne/bc1t/bc1f are converted to bne/beq/bc1f/bc1t.
903 if ((*insn & 0xfc000000) == 0x10000000) // beq
906 *insn = (*insn & 0x03ff0000) | 0x10000005; // beq
|
