| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeVectorOps.cpp | 131 ISD::LoadExtType ExtType = LD->getExtensionType();
132 if (LD->getMemoryVT().isVector() && ExtType != ISD::NON_EXTLOAD) {
301 ISD::LoadExtType ExtType = LD->getExtensionType();
309 SDValue ScalarLoad = DAG.getExtLoad(ExtType, dl,
|
| LegalizeDAG.cpp | [all...] |
| LegalizeVectorTypes.cpp | 708 ISD::LoadExtType ExtType = LD->getExtensionType();
720 Lo = DAG.getLoad(ISD::UNINDEXED, ExtType, LoVT, dl, Ch, Ptr, Offset,
727 Hi = DAG.getLoad(ISD::UNINDEXED, ExtType, HiVT, dl, Ch, Ptr, Offset,
[all...] |
| LegalizeIntegerTypes.cpp | 414 ISD::LoadExtType ExtType =
417 SDValue Res = DAG.getExtLoad(ExtType, dl, NVT, N->getChain(), N->getBasePtr(),
[all...] |
| DAGCombiner.cpp | 143 ISD::NodeType ExtType);
688 ISD::LoadExtType ExtType = ISD::isNON_EXTLoad(LD)
693 return DAG.getExtLoad(ExtType, dl, PVT,
[all...] |
| SelectionDAG.cpp | [all...] |
| LegalizeTypes.h | 655 /// ExtType: extension element type
657 LoadSDNode *LD, ISD::LoadExtType ExtType);
[all...] |
| /external/llvm/include/llvm/Target/ |
| TargetLowering.h | 397 LegalizeAction getLoadExtAction(unsigned ExtType, EVT VT) const {
398 assert(ExtType < ISD::LAST_LOADEXT_TYPE &&
401 return (LegalizeAction)LoadExtActions[VT.getSimpleVT().SimpleTy][ExtType];
406 bool isLoadExtLegal(unsigned ExtType, EVT VT) const {
407 return VT.isSimple() && getLoadExtAction(ExtType, VT) == Legal;
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| SelectionDAG.h | 655 SDValue getExtLoad(ISD::LoadExtType ExtType, DebugLoc dl, EVT VT,
662 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
668 SDValue getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
[all...] |
| /external/llvm/lib/Target/CellSPU/ |
| SPUISelLowering.cpp | 564 ISD::LoadExtType ExtType = LN->getExtensionType();
735 if (ExtType == ISD::SEXTLOAD) {
737 } else if (ExtType == ISD::ZEXTLOAD) {
739 } else if (ExtType == ISD::EXTLOAD) {
[all...] |
