| /external/llvm/lib/Target/PTX/ |
| PTXISelLowering.cpp | 194 const SmallVectorImpl<ISD::InputArg> &Ins,
222 for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
223 assert((!MFI->isKernel() || Ins[i].VT != MVT::i1) &&
226 unsigned ParamSize = Ins[i].VT.getStoreSizeInBits();
231 SDValue ArgValue = DAG.getNode(PTXISD::LOAD_PARAM, dl, Ins[i].VT, Chain,
237 for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
238 EVT RegVT = Ins[i].VT;
350 const SmallVectorImpl<ISD::InputArg> &Ins,
362 // The layout of the ops will be [Chain, #Ins, Ins, Callee, #Outs, Outs
[all...] |
| PTXISelLowering.h | 52 const SmallVectorImpl<ISD::InputArg> &Ins,
72 const SmallVectorImpl<ISD::InputArg> &Ins,
|
| /external/llvm/lib/CodeGen/ |
| CallingConvLower.cpp | 69 CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
71 unsigned NumArgs = Ins.size();
74 MVT ArgVT = Ins[i].VT;
75 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags;
157 void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
159 for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
160 MVT VT = Ins[i].VT;
161 ISD::ArgFlagsTy Flags = Ins[i].Flags;
|
| RegAllocGreedy.cpp | 693 unsigned Ins = 0;
698 BC.Entry = SpillPlacement::MustSpill, ++Ins;
700 BC.Entry = SpillPlacement::PrefSpill, ++Ins;
702 ++Ins;
708 BC.Exit = SpillPlacement::MustSpill, ++Ins;
710 BC.Exit = SpillPlacement::PrefSpill, ++Ins;
712 ++Ins;
716 if (Ins)
717 StaticCost += Ins * SpillPlacer->getBlockFrequency(BC.Number);
904 unsigned Ins = 0
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.h | 130 const SmallVectorImpl<ISD::InputArg> &Ins,
137 const SmallVectorImpl<ISD::InputArg> &Ins,
144 const SmallVectorImpl<ISD::InputArg> &Ins,
151 const SmallVectorImpl<ISD::InputArg> &Ins,
159 const SmallVectorImpl<ISD::InputArg> &Ins,
|
| MSP430ISelLowering.cpp | 249 &Ins,
260 return LowerCCCArguments(Chain, CallConv, isVarArg, Ins, dl, DAG, InVals);
262 if (Ins.empty())
277 const SmallVectorImpl<ISD::InputArg> &Ins,
289 Outs, OutVals, Ins, dl, DAG, InVals);
305 &Ins,
318 CCInfo.AnalyzeFormalArguments(Ins, CC_MSP430);
448 const SmallVectorImpl<ISD::InputArg> &Ins,
560 return LowerCallResult(Chain, InFlag, CallConv, isVarArg, Ins, dl,
570 const SmallVectorImpl<ISD::InputArg> &Ins,
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelLowering.h | 99 const SmallVectorImpl<ISD::InputArg> &Ins,
106 const SmallVectorImpl<ISD::InputArg> &Ins,
113 const SmallVectorImpl<ISD::InputArg> &Ins,
120 const SmallVectorImpl<ISD::InputArg> &Ins,
128 const SmallVectorImpl<ISD::InputArg> &Ins,
|
| SystemZISelLowering.cpp | 239 &Ins,
250 return LowerCCCArguments(Chain, CallConv, isVarArg, Ins, dl, DAG, InVals);
260 const SmallVectorImpl<ISD::InputArg> &Ins,
272 Outs, OutVals, Ins, dl, DAG, InVals);
285 &Ins,
299 CCInfo.AnalyzeFormalArguments(Ins, CC_SystemZ);
379 const SmallVectorImpl<ISD::InputArg> &Ins,
502 return LowerCallResult(Chain, InFlag, CallConv, isVarArg, Ins, dl,
513 &Ins,
522 CCInfo.AnalyzeCallResult(Ins, RetCC_SystemZ)
[all...] |
| /external/llvm/lib/Target/Alpha/ |
| AlphaISelLowering.h | 86 const SmallVectorImpl<ISD::InputArg> &Ins,
120 const SmallVectorImpl<ISD::InputArg> &Ins,
129 const SmallVectorImpl<ISD::InputArg> &Ins,
|
| AlphaISelLowering.cpp | 234 const SmallVectorImpl<ISD::InputArg> &Ins,
341 Ins, dl, DAG, InVals);
350 const SmallVectorImpl<ISD::InputArg> &Ins,
359 CCInfo.AnalyzeCallResult(Ins, RetCC_Alpha);
393 &Ins,
407 for (unsigned ArgNo = 0, e = Ins.size(); ArgNo != e; ++ArgNo) {
409 EVT ObjectVT = Ins[ArgNo].VT;
447 FuncInfo->setVarArgsOffset(Ins.size() * 8);
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsISelLowering.h | 89 Ins
123 const SmallVectorImpl<ISD::InputArg> &Ins,
145 const SmallVectorImpl<ISD::InputArg> &Ins,
155 const SmallVectorImpl<ISD::InputArg> &Ins,
|
| /external/llvm/lib/Target/Blackfin/ |
| BlackfinISelLowering.h | 62 const SmallVectorImpl<ISD::InputArg> &Ins,
70 const SmallVectorImpl<ISD::InputArg> &Ins,
|
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.h | 75 const SmallVectorImpl<ISD::InputArg> &Ins,
85 const SmallVectorImpl<ISD::InputArg> &Ins,
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCISelLowering.h | 375 const SmallVectorImpl<ISD::InputArg> &Ins,
418 const SmallVectorImpl<ISD::InputArg> &Ins,
429 const SmallVectorImpl<ISD::InputArg> &Ins,
435 const SmallVectorImpl<ISD::InputArg> &Ins,
444 const SmallVectorImpl<ISD::InputArg> &Ins,
464 const SmallVectorImpl<ISD::InputArg> &Ins,
470 const SmallVectorImpl<ISD::InputArg> &Ins,
479 const SmallVectorImpl<ISD::InputArg> &Ins,
487 const SmallVectorImpl<ISD::InputArg> &Ins,
|
| PPCISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.h | 114 const SmallVectorImpl<ISD::InputArg> &Ins,
122 const SmallVectorImpl<ISD::InputArg> &Ins,
127 const SmallVectorImpl<ISD::InputArg> &Ins,
173 const SmallVectorImpl<ISD::InputArg> &Ins,
183 const SmallVectorImpl<ISD::InputArg> &Ins,
|
| /external/llvm/lib/Target/MBlaze/ |
| MBlazeISelLowering.h | 115 const SmallVectorImpl<ISD::InputArg> &Ins,
130 const SmallVectorImpl<ISD::InputArg> &Ins,
140 const SmallVectorImpl<ISD::InputArg> &Ins,
|
| MBlazeISelLowering.cpp | 687 const SmallVectorImpl<ISD::InputArg> &Ins,
824 if (!Ins.empty())
830 Ins, dl, DAG, InVals);
837 bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins,
845 CCInfo.AnalyzeCallResult(Ins, RetCC_MBlaze);
867 const SmallVectorImpl<ISD::InputArg> &Ins,
[all...] |
| /external/llvm/lib/Transforms/IPO/ |
| PartialInlining.cpp | 93 BasicBlock::iterator Ins = newReturnBlock->begin();
98 PHINode* retPhi = PHINode::Create(OldPhi->getType(), 2, "", Ins);
100 Ins = newReturnBlock->getFirstNonPHI();
|
| IPConstantPropagation.cpp | 250 Instruction *Ins = cast<Instruction>(*I);
257 if (ExtractValueInst *EV = dyn_cast<ExtractValueInst>(Ins))
270 Ins->replaceAllUsesWith(New);
271 Ins->eraseFromParent();
|
| /external/llvm/lib/Target/CellSPU/ |
| SPUISelLowering.h | 158 const SmallVectorImpl<ISD::InputArg> &Ins,
168 const SmallVectorImpl<ISD::InputArg> &Ins,
|
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.h | 434 const SmallVectorImpl<ISD::InputArg> &Ins,
441 const SmallVectorImpl<ISD::InputArg> &Ins,
458 const SmallVectorImpl<ISD::InputArg> &Ins,
475 const SmallVectorImpl<ISD::InputArg> &Ins,
|
| /external/llvm/include/llvm/CodeGen/ |
| CallingConvLower.h | 196 void AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
223 void AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
|
| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.h | 745 const SmallVectorImpl<ISD::InputArg> &Ins,
771 const SmallVectorImpl<ISD::InputArg> &Ins,
[all...] |
| /external/llvm/include/llvm/Transforms/Utils/ |
| SSAUpdaterImpl.h | 63 SmallVectorImpl<PhiT*> *Ins) :
64 Updater(U), AvailableVals(A), InsertedPHIs(Ins) { }
|
