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  /external/valgrind/main/VEX/auxprogs/
genoffsets.c 117 // ppc32
118 GENOFFSET(PPC32,ppc32,GPR0);
119 GENOFFSET(PPC32,ppc32,GPR1);
120 GENOFFSET(PPC32,ppc32,GPR2);
121 GENOFFSET(PPC32,ppc32,GPR3);
122 GENOFFSET(PPC32,ppc32,GPR4)
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  /external/valgrind/main/coregrind/
pub_core_basics.h 98 } PPC32;
m_libcassert.c 96 (srP)->misc.PPC32.r_lr = lr; \
m_stacktrace.c 394 /* -----------------------ppc32/64 ---------------------- */
423 Addr lr = startRegs->misc.PPC32.r_lr;
517 slot is 2 words back from sp, whereas on ppc32-elf(?) it's
540 ppc64-linux/ppc64-aix/ppc32-aix. If LR points to our
m_machine.c 38 #include "pub_core_libcsignal.h" // for ppc32 messing with SIGILL and SIGFPE
79 regs->misc.PPC32.r_lr
332 (2) from the AT_SYSINFO entries the kernel gave us (ppc32 cache
347 ppc32: initially: call VG_(machine_get_hwcaps)
387 /* For hwcaps detection on ppc32/64 and arm we'll need to do SIGILL
608 /* Find out which subset of the ppc32 instruction set is supported by
609 verifying whether various ppc32 instructions generate a SIGILL
623 since that's a no-op on all ppc32 platforms so far supported,
676 problem that happens on Debian 3.1 (ppc32), and probably
735 /* Same instruction set detection algorithm as for ppc32. *
    [all...]
m_signals.c 343 (srP)->misc.PPC32.r_lr = (uc)->uc_regs->mc_gregs[VKI_PT_LNK]; \
    [all...]
  /external/valgrind/main/
valgrind.spec 20 platforms: x86/Linux, AMD64/Linux, PPC32/Linux, PPC64/Linux, x86/MacOSX,
  /external/qemu/
ppc-dis.c     [all...]

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