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Searched
refs:RCI
(Results
1 - 10
of
10
) sorted by null
/external/llvm/lib/CodeGen/
RegisterClassInfo.cpp
71
RCInfo &
RCI
= RegClass[RC->getID()];
76
if (!
RCI
.Order)
77
RCI
.Order.reset(new unsigned[NumRegs]);
94
RCI
.Order[N++] = PhysReg;
96
RCI
.NumRegs = N + CSRAlias.size();
97
assert (
RCI
.NumRegs <= NumRegs && "Allocation order larger than regclass");
100
std::copy(CSRAlias.begin(), CSRAlias.end(), &
RCI
.Order[N]);
104
if (Super != RC && getNumAllocatableRegs(Super) >
RCI
.NumRegs)
105
RCI
.ProperSubClass = true;
109
for (unsigned I = 0; I !=
RCI
.NumRegs; ++I
[
all
...]
AllocationOrder.cpp
28
: Begin(0), End(0), Pos(0),
RCI
(RegClassInfo), OwnedBegin(false) {
55
if (!
RCI
.isReserved(Order[i]))
65
ArrayRef<unsigned> O =
RCI
.getOrder(RC);
72
!RC->contains(Hint) ||
RCI
.isReserved(Hint)))
AllocationOrder.h
29
const RegisterClassInfo &
RCI
;
RegisterClassInfo.h
65
const RCInfo &
RCI
= RegClass[RC->getID()];
66
if (Tag !=
RCI
.Tag)
68
return
RCI
;
AggressiveAntiDepBreaker.h
134
const RegisterClassInfo &
RCI
,
PostRASchedulerList.cpp
185
AliasAnalysis *AA, const RegisterClassInfo &
RCI
,
197
(AntiDepBreaker *)new AggressiveAntiDepBreaker(MF,
RCI
, CriticalPathRCs) :
199
(AntiDepBreaker *)new CriticalAntiDepBreaker(MF,
RCI
) : NULL));
RegAllocLinearScan.cpp
407
for (TargetRegisterInfo::regclass_iterator
RCI
= tri_->regclass_begin(),
408
E = tri_->regclass_end();
RCI
!= E; ++
RCI
) {
409
RelatedRegClasses.insert(*
RCI
);
410
for (TargetRegisterClass::iterator I = (*
RCI
)->begin(), E = (*
RCI
)->end();
418
RelatedRegClasses.unionSets(PRC, *
RCI
);
420
PRC = *
RCI
;
[
all
...]
CriticalAntiDepBreaker.cpp
30
CriticalAntiDepBreaker(MachineFunction& MFi, const RegisterClassInfo &
RCI
) :
35
RegClassInfo(
RCI
),
AggressiveAntiDepBreaker.cpp
118
const RegisterClassInfo &
RCI
,
124
RegClassInfo(
RCI
),
[
all
...]
/external/llvm/lib/CodeGen/SelectionDAG/
TargetLowering.cpp
[
all
...]
Completed in 749 milliseconds