| /external/qemu/target-i386/ |
| op_helper.c | 235 if (seg_reg == R_CS) {
266 if (seg_reg == R_SS || seg_reg == R_CS)
462 cpu_x86_set_cpl(env, new_segs[R_CS] & 3);
494 tss_load_seg(R_CS, new_segs[R_CS]);
503 if (new_eip > env->segs[R_CS].limit) {
798 PUSHL(ssp, esp, sp_mask, env->segs[R_CS].selector);
815 PUSHW(ssp, esp, sp_mask, env->segs[R_CS].selector);
836 cpu_x86_load_seg_cache(env, R_CS, selector,
971 PUSHQ(esp, env->segs[R_CS].selector)
[all...] |
| cpu.h | 70 #define R_CS 1
732 if (seg_reg == R_CS) {
742 new_hflags = (env->segs[R_CS].flags & DESC_B_MASK)
913 *cs_base = env->segs[R_CS].base;
|
| kvm.c | 396 set_v8086_seg(&sregs.cs, &env->segs[R_CS]);
403 set_seg(&sregs.cs, &env->segs[R_CS]);
510 get_seg(&env->segs[R_CS], &sregs.cs);
543 hflags = (env->segs[R_CS].flags >> DESC_DPL_SHIFT) & HF_CPL_MASK;
555 if ((hflags & HF_LMA_MASK) && (env->segs[R_CS].flags & DESC_L_MASK)) {
558 hflags |= (env->segs[R_CS].flags & DESC_B_MASK) >>
|
| translate.c | [all...] |
| helper.c | 498 cpu_x86_load_seg_cache(env, R_CS, 0xf000, 0xffff0000, 0xffff,
[all...] |
| /external/qemu/ |
| kqemu.c | 526 cpu_x86_load_seg_cache(env, R_CS, selector & 0xfffc,
547 cpu_x86_load_seg_cache(env, R_CS, selector & 0xfffc,
826 (env->segs[R_CS].flags & DESC_L_MASK)) {
833 new_hflags = (env->segs[R_CS].flags & DESC_B_MASK)
902 unsigned long pc = env->eip + env->segs[R_CS].base;
|
| monitor.c | 408 env->eip + env->segs[R_CS].base);
661 (env->segs[R_CS].flags & DESC_L_MASK))
665 if (!(env->segs[R_CS].flags & DESC_B_MASK))
[all...] |
| gdbstub.c | 539 case 2: GET_REG32(env->segs[R_CS].selector);
598 case 2: LOAD_SEG(10, R_CS); return 4;
[all...] |
| exec.c | 1061 cpu_single_env->eip + (long)cpu_single_env->segs[R_CS].base);
[all...] |
| /external/qemu/hw/ |
| apic.c | 503 cpu_x86_load_seg_cache(env, R_CS, s->sipi_vector << 8, s->sipi_vector << 12,
|
| /external/valgrind/main/VEX/priv/ |
| guest_x86_toIR.c | 308 #define R_CS 1
491 case R_CS: return OFFB_CS;
[all...] |
| guest_amd64_toIR.c | 483 #define R_CS 1
[all...] |
