/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | 294 /// SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a 300 SCALAR_TO_VECTOR, [all...] |
/external/llvm/lib/Target/X86/ |
X86ISelLowering.cpp | [all...] |
X86ISelDAGToDAG.cpp | [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
LegalizeVectorTypes.cpp | 60 case ISD::SCALAR_TO_VECTOR: R = ScalarizeVecRes_SCALAR_TO_VECTOR(N); break; 430 case ISD::SCALAR_TO_VECTOR: SplitVecRes_SCALAR_TO_VECTOR(N, Lo, Hi); break; 697 Lo = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, LoVT, N->getOperand(0)); [all...] |
LegalizeDAG.cpp | 682 // SCALAR_TO_VECTOR requires that the type of the value being inserted 688 SDValue ScVec = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, [all...] |
LegalizeIntegerTypes.cpp | 87 case ISD::SCALAR_TO_VECTOR: 769 case ISD::SCALAR_TO_VECTOR: [all...] |
DAGCombiner.cpp | [all...] |
SelectionDAG.cpp | 190 /// ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low 193 if (N->getOpcode() == ISD::SCALAR_TO_VECTOR) [all...] |
/external/llvm/lib/Target/CellSPU/ |
SPUISelLowering.cpp | 438 setOperationAction(ISD::SCALAR_TO_VECTOR, VT, Custom); 449 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4f32, Custom); [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelLowering.cpp | 332 setOperationAction(ISD::SCALAR_TO_VECTOR, VT, Expand); 360 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4f32, Custom); 361 setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4i32, Custom); [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelLowering.cpp | [all...] |