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    Searched refs:ULPD_REG_BASE (Results 1 - 15 of 15) sorted by null

/bionic/libc/kernel/arch-arm/asm/arch/
hardware.h	55 #define ULPD_REG_BASE (0xfffe0800) 56 #define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14) 57 #define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24) 58 #define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30) 61 #define ULPD_SOFT_REQ (ULPD_REG_BASE + 0x34) 65 #define ULPD_DPLL_CTRL (ULPD_REG_BASE + 0x3c) 66 #define ULPD_STATUS_REQ (ULPD_REG_BASE + 0x40) 67 #define ULPD_APLL_CTRL (ULPD_REG_BASE + 0x4c) 68 #define ULPD_POWER_CTRL (ULPD_REG_BASE + 0x50) 69 #define ULPD_SOFT_DISABLE_REQ_REG (ULPD_REG_BASE + 0x68     [all...]
/development/ndk/platforms/android-3/arch-arm/include/asm/arch/
hardware.h	55 #define ULPD_REG_BASE (0xfffe0800) 56 #define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14) 57 #define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24) 58 #define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30) 61 #define ULPD_SOFT_REQ (ULPD_REG_BASE + 0x34) 65 #define ULPD_DPLL_CTRL (ULPD_REG_BASE + 0x3c) 66 #define ULPD_STATUS_REQ (ULPD_REG_BASE + 0x40) 67 #define ULPD_APLL_CTRL (ULPD_REG_BASE + 0x4c) 68 #define ULPD_POWER_CTRL (ULPD_REG_BASE + 0x50) 69 #define ULPD_SOFT_DISABLE_REQ_REG (ULPD_REG_BASE + 0x68     [all...]
/prebuilt/ndk/android-ndk-r4/platforms/android-3/arch-arm/usr/include/asm/arch/
hardware.h	55 #define ULPD_REG_BASE (0xfffe0800) 56 #define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14) 57 #define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24) 58 #define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30) 61 #define ULPD_SOFT_REQ (ULPD_REG_BASE + 0x34) 65 #define ULPD_DPLL_CTRL (ULPD_REG_BASE + 0x3c) 66 #define ULPD_STATUS_REQ (ULPD_REG_BASE + 0x40) 67 #define ULPD_APLL_CTRL (ULPD_REG_BASE + 0x4c) 68 #define ULPD_POWER_CTRL (ULPD_REG_BASE + 0x50) 69 #define ULPD_SOFT_DISABLE_REQ_REG (ULPD_REG_BASE + 0x68     [all...]
/prebuilt/ndk/android-ndk-r4/platforms/android-4/arch-arm/usr/include/asm/arch/
hardware.h	55 #define ULPD_REG_BASE (0xfffe0800) 56 #define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14) 57 #define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24) 58 #define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30) 61 #define ULPD_SOFT_REQ (ULPD_REG_BASE + 0x34) 65 #define ULPD_DPLL_CTRL (ULPD_REG_BASE + 0x3c) 66 #define ULPD_STATUS_REQ (ULPD_REG_BASE + 0x40) 67 #define ULPD_APLL_CTRL (ULPD_REG_BASE + 0x4c) 68 #define ULPD_POWER_CTRL (ULPD_REG_BASE + 0x50) 69 #define ULPD_SOFT_DISABLE_REQ_REG (ULPD_REG_BASE + 0x68     [all...]
/prebuilt/ndk/android-ndk-r4/platforms/android-5/arch-arm/usr/include/asm/arch/
hardware.h	55 #define ULPD_REG_BASE (0xfffe0800) 56 #define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14) 57 #define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24) 58 #define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30) 61 #define ULPD_SOFT_REQ (ULPD_REG_BASE + 0x34) 65 #define ULPD_DPLL_CTRL (ULPD_REG_BASE + 0x3c) 66 #define ULPD_STATUS_REQ (ULPD_REG_BASE + 0x40) 67 #define ULPD_APLL_CTRL (ULPD_REG_BASE + 0x4c) 68 #define ULPD_POWER_CTRL (ULPD_REG_BASE + 0x50) 69 #define ULPD_SOFT_DISABLE_REQ_REG (ULPD_REG_BASE + 0x68     [all...]
/prebuilt/ndk/android-ndk-r4/platforms/android-8/arch-arm/usr/include/asm/arch/
hardware.h	55 #define ULPD_REG_BASE (0xfffe0800) 56 #define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14) 57 #define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24) 58 #define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30) 61 #define ULPD_SOFT_REQ (ULPD_REG_BASE + 0x34) 65 #define ULPD_DPLL_CTRL (ULPD_REG_BASE + 0x3c) 66 #define ULPD_STATUS_REQ (ULPD_REG_BASE + 0x40) 67 #define ULPD_APLL_CTRL (ULPD_REG_BASE + 0x4c) 68 #define ULPD_POWER_CTRL (ULPD_REG_BASE + 0x50) 69 #define ULPD_SOFT_DISABLE_REQ_REG (ULPD_REG_BASE + 0x68     [all...]
/prebuilt/ndk/android-ndk-r5/platforms/android-3/arch-arm/usr/include/asm/arch/
hardware.h	55 #define ULPD_REG_BASE (0xfffe0800) 56 #define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14) 57 #define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24) 58 #define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30) 61 #define ULPD_SOFT_REQ (ULPD_REG_BASE + 0x34) 65 #define ULPD_DPLL_CTRL (ULPD_REG_BASE + 0x3c) 66 #define ULPD_STATUS_REQ (ULPD_REG_BASE + 0x40) 67 #define ULPD_APLL_CTRL (ULPD_REG_BASE + 0x4c) 68 #define ULPD_POWER_CTRL (ULPD_REG_BASE + 0x50) 69 #define ULPD_SOFT_DISABLE_REQ_REG (ULPD_REG_BASE + 0x68     [all...]
/prebuilt/ndk/android-ndk-r6/platforms/android-3/arch-arm/usr/include/asm/arch/
hardware.h	55 #define ULPD_REG_BASE (0xfffe0800) 56 #define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14) 57 #define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24) 58 #define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30) 61 #define ULPD_SOFT_REQ (ULPD_REG_BASE + 0x34) 65 #define ULPD_DPLL_CTRL (ULPD_REG_BASE + 0x3c) 66 #define ULPD_STATUS_REQ (ULPD_REG_BASE + 0x40) 67 #define ULPD_APLL_CTRL (ULPD_REG_BASE + 0x4c) 68 #define ULPD_POWER_CTRL (ULPD_REG_BASE + 0x50) 69 #define ULPD_SOFT_DISABLE_REQ_REG (ULPD_REG_BASE + 0x68     [all...]
/prebuilt/ndk/android-ndk-r7/platforms/android-14/arch-arm/usr/include/asm/arch/
hardware.h	55 #define ULPD_REG_BASE (0xfffe0800) 56 #define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14) 57 #define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24) 58 #define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30) 61 #define ULPD_SOFT_REQ (ULPD_REG_BASE + 0x34) 65 #define ULPD_DPLL_CTRL (ULPD_REG_BASE + 0x3c) 66 #define ULPD_STATUS_REQ (ULPD_REG_BASE + 0x40) 67 #define ULPD_APLL_CTRL (ULPD_REG_BASE + 0x4c) 68 #define ULPD_POWER_CTRL (ULPD_REG_BASE + 0x50) 69 #define ULPD_SOFT_DISABLE_REQ_REG (ULPD_REG_BASE + 0x68     [all...]
/prebuilt/ndk/android-ndk-r7/platforms/android-3/arch-arm/usr/include/asm/arch/
hardware.h	55 #define ULPD_REG_BASE (0xfffe0800) 56 #define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14) 57 #define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24) 58 #define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30) 61 #define ULPD_SOFT_REQ (ULPD_REG_BASE + 0x34) 65 #define ULPD_DPLL_CTRL (ULPD_REG_BASE + 0x3c) 66 #define ULPD_STATUS_REQ (ULPD_REG_BASE + 0x40) 67 #define ULPD_APLL_CTRL (ULPD_REG_BASE + 0x4c) 68 #define ULPD_POWER_CTRL (ULPD_REG_BASE + 0x50) 69 #define ULPD_SOFT_DISABLE_REQ_REG (ULPD_REG_BASE + 0x68     [all...]
/prebuilt/ndk/android-ndk-r7/platforms/android-4/arch-arm/usr/include/asm/arch/
hardware.h	55 #define ULPD_REG_BASE (0xfffe0800) 56 #define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14) 57 #define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24) 58 #define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30) 61 #define ULPD_SOFT_REQ (ULPD_REG_BASE + 0x34) 65 #define ULPD_DPLL_CTRL (ULPD_REG_BASE + 0x3c) 66 #define ULPD_STATUS_REQ (ULPD_REG_BASE + 0x40) 67 #define ULPD_APLL_CTRL (ULPD_REG_BASE + 0x4c) 68 #define ULPD_POWER_CTRL (ULPD_REG_BASE + 0x50) 69 #define ULPD_SOFT_DISABLE_REQ_REG (ULPD_REG_BASE + 0x68     [all...]
/prebuilt/ndk/android-ndk-r7/platforms/android-5/arch-arm/usr/include/asm/arch/
hardware.h	55 #define ULPD_REG_BASE (0xfffe0800) 56 #define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14) 57 #define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24) 58 #define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30) 61 #define ULPD_SOFT_REQ (ULPD_REG_BASE + 0x34) 65 #define ULPD_DPLL_CTRL (ULPD_REG_BASE + 0x3c) 66 #define ULPD_STATUS_REQ (ULPD_REG_BASE + 0x40) 67 #define ULPD_APLL_CTRL (ULPD_REG_BASE + 0x4c) 68 #define ULPD_POWER_CTRL (ULPD_REG_BASE + 0x50) 69 #define ULPD_SOFT_DISABLE_REQ_REG (ULPD_REG_BASE + 0x68     [all...]
/prebuilt/ndk/android-ndk-r7/platforms/android-8/arch-arm/usr/include/asm/arch/
hardware.h	55 #define ULPD_REG_BASE (0xfffe0800) 56 #define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14) 57 #define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24) 58 #define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30) 61 #define ULPD_SOFT_REQ (ULPD_REG_BASE + 0x34) 65 #define ULPD_DPLL_CTRL (ULPD_REG_BASE + 0x3c) 66 #define ULPD_STATUS_REQ (ULPD_REG_BASE + 0x40) 67 #define ULPD_APLL_CTRL (ULPD_REG_BASE + 0x4c) 68 #define ULPD_POWER_CTRL (ULPD_REG_BASE + 0x50) 69 #define ULPD_SOFT_DISABLE_REQ_REG (ULPD_REG_BASE + 0x68     [all...]
/prebuilt/ndk/android-ndk-r7/platforms/android-9/arch-arm/usr/include/asm/arch/
hardware.h	55 #define ULPD_REG_BASE (0xfffe0800) 56 #define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14) 57 #define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24) 58 #define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30) 61 #define ULPD_SOFT_REQ (ULPD_REG_BASE + 0x34) 65 #define ULPD_DPLL_CTRL (ULPD_REG_BASE + 0x3c) 66 #define ULPD_STATUS_REQ (ULPD_REG_BASE + 0x40) 67 #define ULPD_APLL_CTRL (ULPD_REG_BASE + 0x4c) 68 #define ULPD_POWER_CTRL (ULPD_REG_BASE + 0x50) 69 #define ULPD_SOFT_DISABLE_REQ_REG (ULPD_REG_BASE + 0x68     [all...]
/external/kernel-headers/original/asm-arm/arch/
hardware.h	104 #define ULPD_REG_BASE (0xfffe0800) 105 #define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14) 106 #define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24) 107 #define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30) 110 #define ULPD_SOFT_REQ (ULPD_REG_BASE + 0x34) 114 #define ULPD_DPLL_CTRL (ULPD_REG_BASE + 0x3c) 115 #define ULPD_STATUS_REQ (ULPD_REG_BASE + 0x40) 116 #define ULPD_APLL_CTRL (ULPD_REG_BASE + 0x4c) 117 #define ULPD_POWER_CTRL (ULPD_REG_BASE + 0x50) 118 #define ULPD_SOFT_DISABLE_REQ_REG (ULPD_REG_BASE + 0x68     [all...]

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