| /external/v8/src/mips/ |
| macro-assembler-mips.cc | 356 addiu(rd, rs, rt.imm32_);
372 addiu(rd, rs, -rt.imm32_); // No subiu instr, use addiu(x, y, -imm).
569 addiu(rd, zero_reg, j.imm32_);
586 addiu(rd, zero_reg, j.imm32_);
613 addiu(sp, sp, -4 * NumToPush);
626 addiu(sp, sp, -4 * NumToPush);
643 addiu(sp, sp, 4 * NumSaved);
655 addiu(sp, sp, 4 * NumSaved);
[all...] |
| disasm-mips.cc | 820 case ADDIU:
821 Format(instr, "addiu 'rt, 'rs, 'imm16s");
|
| assembler-mips.h | 594 void addiu(Register rd, Register rs, int32_t j);
[all...] |
| assembler-mips.cc | 202 // addiu(sp, sp, 4) aka Pop() operation or part of Pop(r)
204 const Instr kPopInstruction = ADDIU | (sp.code() << kRsShift)
206 // addiu(sp, sp, -4) part of Push(r) operation as pre-decrement of sp.
207 const Instr kPushInstruction = ADDIU | (sp.code() << kRsShift)
458 return ((instr & kOpcodeMask) == ADDIU);
980 void Assembler::addiu(Register rd, Register rs, int32_t j) { function in class:v8::internal::Assembler
981 GenInstrImmediate(ADDIU, rs, rd, j);
984 // addiu(sp, sp, Operand(-kPointerSize));
986 // addiu(sp, sp, Operand(kPointerSize));
1000 // addiu(sp, sp, -kPointerSize
[all...] |
| /external/webkit/Source/JavaScriptCore/assembler/ |
| MacroAssemblerMIPS.h | 117 addiu dest, src, imm
119 m_assembler.addiu(dest, src, imm.m_value);
144 m_assembler.addiu(dataTempRegister, dataTempRegister,
166 m_assembler.addiu(dataTempRegister, dataTempRegister,
223 m_assembler.addiu(dataTempRegister, dataTempRegister, imm.m_value);
348 addiu dest, src, imm
350 m_assembler.addiu(dest, dest, -imm.m_value);
375 m_assembler.addiu(dataTempRegister, dataTempRegister,
399 m_assembler.addiu(dataTempRegister, dataTempRegister,
430 m_assembler.addiu(dataTempRegister, dataTempRegister
[all...] |
| MIPSAssembler.h | 253 addiu(dest, MIPSRegisters::zero, imm);
268 void addiu(RegisterID rt, RegisterID rs, int imm) function in class:JSC::MIPSAssembler
|
| /external/v8/test/cctest/ |
| test-assembler-mips.cc | 102 __ addiu(a1, a1, -1);
136 // Test lui, ori, and addiu, used in the li pseudo-instruction.
144 __ addiu(t1, t0, 1);
145 __ addiu(t2, t1, -0x10);
193 __ addiu(v0, zero_reg, 0x7421); // 0x00007421
194 __ addiu(v0, v0, -0x1); // 0x00007420
195 __ addiu(v0, v0, -0x20); // 0x00007400
198 __ addiu(v1, t3, 0x1); // 0x80000000
[all...] |
