| /external/valgrind/main/cachegrind/ |
| cg-ppc32.c | 40 void VG_(configure_caches)(cache_t* I1c, cache_t* D1c, cache_t* LLc,
44 *I1c = (cache_t) { 65536, 2, 64 };
45 *D1c = (cache_t) { 65536, 2, 64 };
46 *LLc = (cache_t) { 262144, 8, 64 };
|
| cg-ppc64.c | 40 void VG_(configure_caches)(cache_t* I1c, cache_t* D1c, cache_t* LLc,
44 *I1c = (cache_t) { 65536, 2, 64 };
45 *D1c = (cache_t) { 65536, 2, 64 };
46 *LLc = (cache_t) { 262144, 8, 64 };
|
| cg_arch.h | 39 } cache_t; typedef in typeref:struct:__anon12255
43 void VG_(configure_caches)(cache_t* I1c, cache_t* D1c, cache_t* LLc,
|
| cg-arm.c | 40 void VG_(configure_caches)(cache_t* I1c, cache_t* D1c, cache_t* LLc,
44 *I1c = (cache_t) { 16384, 4, 64 };
45 *D1c = (cache_t) { 16384, 4, 64 };
46 *LLc = (cache_t) { 262144, 8, 64 };
|
| cg-x86-amd64.c | 62 Int Intel_cache_info(Int level, cache_t* I1c, cache_t* D1c, cache_t* LLc)
78 cache_t L3c = { 0, 0, 0 };
119 case 0x06: *I1c = (cache_t) { 8, 4, 32 }; break;
120 case 0x08: *I1c = (cache_t) { 16, 4, 32 }; break;
121 case 0x09: *I1c = (cache_t) { 32, 4, 64 }; break;
122 case 0x30: *I1c = (cache_t) { 32, 8, 64 }; break;
124 case 0x0a: *D1c = (cache_t) { 8, 2, 32 }; break;
125 case 0x0c: *D1c = (cache_t) { 16, 4, 32 }; break
[all...] |
| cg_sim.c | 54 static void cachesim_initcache(cache_t config, cache_t2* c)
90 static void cachesim_##L##_initcache(cache_t config) \
|
| cg_main.c | [all...] |
| /external/clang/test/Sema/ |
| compound-literal.c | 15 typedef struct { } cache_t; // -expected-warning{{empty struct (accepted as an extension) has size 0 in C, size 1 in C++}} typedef in typeref:struct:__anon5082
16 static cache_t clo_I1_cache = ((cache_t) { } ); // -expected-warning{{use of GNU empty initializer extension}}
|
| /external/valgrind/main/callgrind/ |
| sim.c | 176 static void cachesim_initcache(cache_t config, cache_t2* c)
[all...] |
