| /external/llvm/lib/CodeGen/ |
| OptimizePHIs.cpp | 169 if (!MRI->constrainRegClass(SingleValReg, MRI->getRegClass(OldReg)))
|
| MachineRegisterInfo.cpp | 51 MachineRegisterInfo::constrainRegClass(unsigned Reg,
|
| UnreachableBlockElim.cpp | 201 MRI.constrainRegClass(Input, MRI.getRegClass(Output));
|
| MachineCSE.cpp | 135 if (!MRI->constrainRegClass(SrcReg, MRI->getRegClass(Reg)))
446 if (!MRI->constrainRegClass(NewReg, OldRC)) {
|
| MachineLICM.cpp | [all...] |
| RegisterCoalescer.cpp | 717 !MRI->constrainRegClass(IntB.reg, MRI->getRegClass(IntA.reg)))
[all...] |
| /external/llvm/include/llvm/CodeGen/ |
| MachineRegisterInfo.h | 178 /// constrainRegClass(ToReg, getRegClass(FromReg))
227 /// constrainRegClass - Constrain the register class of the specified virtual
234 const TargetRegisterClass *constrainRegClass(unsigned Reg,
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| InstrEmitter.cpp | 299 if (DstRC && !MRI->constrainRegClass(VReg, DstRC, MinRCSize)) {
408 RC = MRI->constrainRegClass(VReg, RC, MinRCSize);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86InstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMLoadStoreOptimizer.cpp | [all...] |
| ARMBaseRegisterInfo.cpp | [all...] |
| ARMISelLowering.cpp | [all...] |
