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  /dalvik/vm/mterp/x86-atom/
OP_INVOKE_VIRTUAL_QUICK.S 26 FETCH 2, %edx # %edx<- GFED or CCCC
28 and $$15, %edx # %edx<- D if not range
31 GET_VREG %edx # %edx<- "this" ptr
32 cmp $$0, %edx # %edx<- check for null "this"
35 movl offObject_clazz(%edx), %edx # %edx<- thisPtr->claz
    [all...]
OP_DOUBLE_TO_FLOAT.S 31 movl rINST, %edx # %edx<- BA
33 and $$15, %edx # %edx<- A
35 fstps (rFP, %edx, 4) # store float
OP_FLOAT_TO_DOUBLE.S 31 movl rINST, %edx # %edx<- BA
33 and $$15, %edx # %edx<- A
35 fstpl (rFP, %edx, 4) # store double
OP_GOTO.S 33 movsbl rINSTbl, %edx # %edx<- +AA
34 shl $$1, %edx # %edx is shifted for byte offset
36 FINISH_RB %edx, %ecx # jump to next instruction
OP_DIV_DOUBLE_2ADDR.S 31 movl rINST, %edx # %edx<- BA
32 andl $$15, %edx # %edx<- A
34 fldl (rFP, %edx, 4) # %xmm0<- vA
36 fstpl (rFP, %edx, 4) # vAA<- result
OP_MOVE_16.S 31 FETCH 2, %edx # %edx<- BBBB
34 GET_VREG %edx # %edx<- vB
35 SET_VREG %edx, %ecx # vA<- vB; %edx
OP_MOVE_FROM16.S 31 FETCH 1, %edx # %edx<- BBBB
33 GET_VREG %edx # %edx<- vB
34 SET_VREG %edx, rINST # vA<- vB; %edx
OP_RSUB_INT_LIT8.S 32 FETCH_CCs 1, %edx # %edx<- +CC, sign-extended literal
34 sub %ecx, %edx # %edx<- +CC sub vBB
35 SET_VREG %edx, rINST # vAA<- %edx; result
OP_FILL_ARRAY_DATA.S 33 FETCH 2, %edx # %edx<- BBBBhi
34 shl $$16, %edx # prepare to create +BBBBBBBB
35 or %ecx, %edx # %edx<- +BBBBBBBB
36 lea (rPC, %edx, 2), %edx # %edx<- PC + +BBBBBBBB; array data location
38 push %edx
42 FFETCH_ADV 3, %edx # %edx<- next instruction hi; fetch, advanc
    [all...]
OP_CONST_4.S 31 movl rINST, %edx # %edx<- BA
33 shl $$24, %edx # %edx<- B000
34 sar $$28, %edx # %edx<- right-zero-extended B
36 SET_VREG %edx, rINST # vA<- %edx; literal
OP_MUL_LONG_2ADDR.S 46 movl rINST, %edx # %edx<- BA+
48 andl $$15, %edx # %edx<- A
49 movl %edx, sReg0 # sReg0<- A
56 * Z = (rFP, %edx, 4)
57 * Y = 4(rFP, %edx, 4)
62 imull (rFP, %edx, 4), %ecx # %ecx<- WxZ
63 movl 4(rFP, %edx, 4), %eax # %eax<- Y
66 movl (rFP, %edx, 4), %eax # %eax<-
    [all...]
OP_GOTO_16.S 31 FETCHs 1, %edx # %edx<- ssssAAAA (sign-extended)
32 shl $$1, %edx # %edx is doubled to get the byte offset
34 FINISH_RB %edx, %ecx # jump to next instruction
OP_CONST_WIDE.S 32 FETCH 2, %edx # %edx<- BBBBlohi
33 shl $$16, %edx # %edx<- prepare to create #+BBBBBBBBlo
34 or %edx, %ecx # %ecx<- #+BBBBBBBBlo
37 FETCH 4, %edx # %edx<- BBBBhihi
39 shl $$16, %edx # %edx<- prepare to create #+BBBBBBBBhi
40 or %edx, %ecx # %ecx<- #+BBBBBBBBh
    [all...]
OP_GOTO_32.S 31 FETCH 1, %edx # %edx<- AAAAlo
34 or %ecx, %edx # %edx<- +AAAAAAAA
35 shl $$1, %edx # %edx is doubled to get the byte offset
37 FINISH_RB %edx, %ecx # jump to next instruction
OP_REM_FLOAT_2ADDR.S 32 movl rINST, %edx # %edx<- BA
33 shr $$4, %edx # %edx<- B
35 GET_VREG %edx # %edx<- vB
38 movl %edx, -4(%esp) # push parameter vB
binopLit8S.S 20 * to specify an instruction that performs "%edx = %edx op %cl"
34 FETCH_BB 1, %edx # %edx<- BB
37 GET_VREG %edx # %edx<- vBB
38 $instr # %edx<- vBB op +CC
39 SET_VREG %edx, rINST # vAA<- %edx; result
binopS.S 20 * specify an instruction that performs "%edx = %edx op %cl"
32 FETCH_BB 1, %edx # %edx<- BB
35 GET_VREG %edx # %edx<- vBB
37 $instr # %edx<- vBB op +CC
38 SET_VREG %edx, rINST # vAA<- %edx; result
binopS2addr.S 21 * "%edx = %edx op %cl".
36 movl rINST, %edx # %edx<- A
39 GET_VREG %edx # %edx<- vA
40 $instr # %edx<- vA op vB
41 SET_VREG %edx, rINST # vAA<- %edx; result
OP_CONST_16.S 31 FETCHs 1, %edx # %edx<- BBBB
33 SET_VREG %edx rINST # vAA<- BBBB; literal
OP_RETURN_COMMON.S 31 movl rGLUE, %edx # %edx<- pMterpGlue
33 movl rINST, offGlue_retval(%edx) # glue->retval<- vAA
OP_RETURN_WIDE.S 31 movl rGLUE, %edx # %edx<- pMterpGlue
33 movq %xmm0, offGlue_retval(%edx)# glue->retval<- vAA
OP_IGET.S 40 movl rGLUE, %edx # %edx<- pMterpGlue
41 movl offGlue_methodClassDex(%edx), %edx # %edx<- pDvmDex
43 movl offDvmDex_pResFields(%edx), %edx # %edx<- pDvmDex->pResFields
44 cmp $$0, (%edx, %ecx, 4) # check for null ptr; resolved InstField ptr
45 movl (%edx, %ecx, 4), %eax # %eax<- resolved InstField pt
    [all...]
  /bionic/libc/arch-x86/string/
strcmp.S 17 movl 0x08(%esp),%edx
22 incl %edx
26 cmpb %cl,(%edx) /* chars match??? */
29 incl %edx
33 cmpb %cl,(%edx)
36 incl %edx
40 cmpb %cl,(%edx)
43 incl %edx
47 cmpb %cl,(%edx)
50 incl %edx
    [all...]
bzero.S 12 movl 12(%esp),%edx
22 cmpl $16,%edx
28 subl %ecx,%edx
32 movl %edx,%ecx /* zero by words */
34 andl $3,%edx
38 L1: movl %edx,%ecx /* zero remainder by bytes */
  /bionic/libc/arch-x86/bionic/
_setjmp.S 48 movl 0(%esp),%edx
49 movl %edx, 0(%eax) /* rta */
59 movl 4(%esp),%edx
61 movl 0(%edx),%ecx
62 movl 4(%edx),%ebx
63 movl 8(%edx),%esp
64 movl 12(%edx),%ebp
65 movl 16(%edx),%esi
66 movl 20(%edx),%edi

Completed in 65 milliseconds

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