| /external/llvm/include/llvm/CodeGen/ |
| MachineMemOperand.h | 107 const MachinePointerInfo &getPointerInfo() const { return PtrInfo; }
|
| SelectionDAGNodes.h | 942 const MachinePointerInfo &getPointerInfo() const {
943 return MMO->getPointerInfo();
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeDAG.cpp | 400 return DAG.getStore(Chain, dl, Result, Ptr, ST->getPointerInfo(),
433 ST->getPointerInfo().getWithOffset(Offset),
455 ST->getPointerInfo()
481 ST->getPointerInfo(), NewStoredVT,
487 ST->getPointerInfo().getWithOffset(IncrementSize),
508 SDValue newLoad = DAG.getLoad(intVT, dl, Chain, Ptr, LD->getPointerInfo(),
538 LD->getPointerInfo().getWithOffset(Offset),
555 LD->getPointerInfo().getWithOffset(Offset),
599 Lo = DAG.getExtLoad(ISD::ZEXTLOAD, dl, VT, Chain, Ptr, LD->getPointerInfo(),
605 LD->getPointerInfo().getWithOffset(IncrementSize)
[all...] |
| DAGCombiner.cpp | 695 LD->getPointerInfo(),
[all...] |
| LegalizeVectorTypes.cpp | 194 N->getPointerInfo(),
382 N->getBasePtr(), N->getPointerInfo(),
388 N->getBasePtr(), N->getPointerInfo(),
721 LD->getPointerInfo(), LoMemVT, isVolatile, isNonTemporal,
728 LD->getPointerInfo().getWithOffset(IncrementSize),
[all...] |
| LegalizeTypesGeneric.cpp | 218 Lo = DAG.getLoad(NVT, dl, Chain, Ptr, LD->getPointerInfo(),
226 LD->getPointerInfo().getWithOffset(IncrementSize),
410 Lo = DAG.getStore(Chain, dl, Lo, Ptr, St->getPointerInfo(),
417 St->getPointerInfo().getWithOffset(IncrementSize),
|
| LegalizeVectorOps.cpp | 311 Chain, BasePTR, LD->getPointerInfo().getWithOffset(Idx * Stride),
371 ST->getPointerInfo().getWithOffset(Idx*Stride), MemSclVT,
|
| LegalizeIntegerTypes.cpp | 418 N->getPointerInfo(),
[all...] |
| LegalizeFloatTypes.cpp | 482 L->getPointerInfo(), NVT,
493 L->getBasePtr(), L->getOffset(), L->getPointerInfo(),
[all...] |
| TargetLowering.cpp | [all...] |
| SelectionDAG.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| MachineFunction.cpp | 240 getMachineMemOperand((*I)->getPointerInfo(),
272 getMachineMemOperand((*I)->getPointerInfo(),
|
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | 452 BasePtr, LD->getPointerInfo(), MVT::i16,
458 LD->getPointerInfo().getWithOffset(2),
517 ST->getPointerInfo(), MVT::i16,
523 ST->getPointerInfo().getWithOffset(2),
[all...] |
| /external/llvm/lib/Target/CellSPU/ |
| SPUISelLowering.cpp | 579 uint64_t mpi_offset = LN->getPointerInfo().Offset;
581 MachinePointerInfo lowMemPtr(LN->getPointerInfo().V, mpi_offset);
582 MachinePointerInfo highMemPtr(LN->getPointerInfo().V, mpi_offset+16);
778 uint64_t mpi_offset = SN->getPointerInfo().Offset;
780 MachinePointerInfo lowMemPtr(SN->getPointerInfo().V, mpi_offset);
781 MachinePointerInfo highMemPtr(SN->getPointerInfo().V, mpi_offset+16);
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86ISelDAGToDAG.cpp | 597 switch (N->getPointerInfo().getAddrSpace()) {
[all...] |
| X86ISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMISelLowering.cpp | [all...] |
