/external/qemu/ |
cpu-common.h | 28 typedef void CPUWriteMemoryFunc(void *opaque, target_phys_addr_t addr, uint32_t value); 29 typedef uint32_t CPUReadMemoryFunc(void *opaque, target_phys_addr_t addr); 31 void cpu_register_physical_memory_log(target_phys_addr_t start_addr, 37 static inline void cpu_register_physical_memory_offset(target_phys_addr_t start_addr, 46 static inline void cpu_register_physical_memory(target_phys_addr_t start_addr, 53 ram_addr_t cpu_get_physical_page_desc(target_phys_addr_t addr); 73 void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf, 75 static inline void cpu_physical_memory_read(target_phys_addr_t addr, 80 static inline void cpu_physical_memory_write(target_phys_addr_t addr, 85 void *cpu_physical_memory_map(target_phys_addr_t addr [all...] |
targphys.h | 1 /* Define target_phys_addr_t if it exists. */ 7 /* target_phys_addr_t is the type of a physical address (its size can 11 typedef uint32_t target_phys_addr_t; typedef 15 typedef uint64_t target_phys_addr_t; typedef
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dma.h | 19 target_phys_addr_t base; 20 target_phys_addr_t len; 27 target_phys_addr_t size; 31 void qemu_sglist_add(QEMUSGList *qsg, target_phys_addr_t base, 32 target_phys_addr_t len);
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kvm.h | 45 void kvm_set_phys_mem(target_phys_addr_t start_addr, 49 int kvm_physical_sync_dirty_bitmap(target_phys_addr_t start_addr, 50 target_phys_addr_t end_addr); 52 int kvm_log_start(target_phys_addr_t phys_addr, ram_addr_t size); 53 int kvm_log_stop(target_phys_addr_t phys_addr, ram_addr_t size); 60 int kvm_coalesce_mmio_region(target_phys_addr_t start, ram_addr_t size); 61 int kvm_uncoalesce_mmio_region(target_phys_addr_t start, ram_addr_t size);
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disas.h | 25 typedef const char *(*lookup_symbol_t)(struct syminfo *s, target_phys_addr_t orig_addr);
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sysemu.h | 228 int load_image_targphys(const char *filename, target_phys_addr_t, int max_sz); 231 int load_aout(const char *filename, target_phys_addr_t addr, int max_sz); 235 int fread_targphys(target_phys_addr_t dst_addr, size_t nbytes, FILE *f); 236 int fread_targphys_ok(target_phys_addr_t dst_addr, size_t nbytes, FILE *f); 237 int read_targphys(int fd, target_phys_addr_t dst_addr, size_t nbytes); 238 void pstrcpy_targphys(target_phys_addr_t dest, int buf_size,
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exec.c | 204 target_phys_addr_t base; 346 static PhysPageDesc *phys_page_find_alloc(target_phys_addr_t index, int alloc) 385 static inline PhysPageDesc *phys_page_find(target_phys_addr_t index) 786 target_phys_addr_t phys_pc; 946 void tb_invalidate_phys_page_range(target_phys_addr_t start, target_phys_addr_t end, 1052 static inline void tb_invalidate_phys_page_fast(target_phys_addr_t start, int len) [all...] |
loader.c | 84 int fread_targphys(target_phys_addr_t dst_addr, size_t nbytes, FILE *f) 87 target_phys_addr_t dst_begin = dst_addr; 104 int fread_targphys_ok(target_phys_addr_t dst_addr, size_t nbytes, FILE *f) 110 int read_targphys(int fd, target_phys_addr_t dst_addr, size_t nbytes) 113 target_phys_addr_t dst_begin = dst_addr; 130 target_phys_addr_t addr, int max_sz) 145 void pstrcpy_targphys(target_phys_addr_t dest, int buf_size, 211 int load_aout(const char *filename, target_phys_addr_t addr, int max_sz)
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dma-helpers.c | 21 void qemu_sglist_add(QEMUSGList *qsg, target_phys_addr_t base, 22 target_phys_addr_t len) 47 target_phys_addr_t sg_cur_byte; 85 target_phys_addr_t cur_addr, cur_len;
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kvm-all.c | 44 target_phys_addr_t start_addr; 87 target_phys_addr_t start_addr, 88 target_phys_addr_t end_addr) 108 target_phys_addr_t start_addr, 109 target_phys_addr_t end_addr) 222 static int kvm_dirty_pages_log_change(target_phys_addr_t phys_addr, 252 int kvm_log_start(target_phys_addr_t phys_addr, ram_addr_t size) 259 int kvm_log_stop(target_phys_addr_t phys_addr, ram_addr_t size) 296 int kvm_physical_sync_dirty_bitmap(target_phys_addr_t start_addr, 297 target_phys_addr_t end_addr [all...] |
/external/qemu/hw/ |
arm-misc.h | 29 target_phys_addr_t loader_start; 30 target_phys_addr_t smp_loader_start; 31 target_phys_addr_t smp_priv_base; 37 target_phys_addr_t initrd_size; 38 target_phys_addr_t entry;
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isa.h | 9 extern target_phys_addr_t isa_mem_base; 11 void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size);
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fdc.h | 7 target_phys_addr_t io_base, 9 fdctrl_t *sun4m_fdctrl_init (qemu_irq irq, target_phys_addr_t io_base,
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sysbus.h | 12 typedef void (*mmio_mapfunc)(SysBusDevice *dev, target_phys_addr_t addr); 21 target_phys_addr_t addr; 22 target_phys_addr_t size; 42 void sysbus_init_mmio(SysBusDevice *dev, target_phys_addr_t size, int iofunc); 43 void sysbus_init_mmio_cb(SysBusDevice *dev, target_phys_addr_t size, 50 void sysbus_mmio_map(SysBusDevice *dev, int n, target_phys_addr_t addr); 54 target_phys_addr_t addr, ...); 56 target_phys_addr_t addr,
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pxa.h | 66 qemu_irq *pxa2xx_pic_init(target_phys_addr_t base, CPUState *env); 69 void pxa25x_timer_init(target_phys_addr_t base, qemu_irq *irqs); 70 void pxa27x_timer_init(target_phys_addr_t base, qemu_irq *irqs, qemu_irq irq4); 74 PXA2xxGPIOInfo *pxa2xx_gpio_init(target_phys_addr_t base, 83 PXA2xxDMAState *pxa255_dma_init(target_phys_addr_t base, 85 PXA2xxDMAState *pxa27x_dma_init(target_phys_addr_t base, 91 PXA2xxLCDState *pxa2xx_lcdc_init(target_phys_addr_t base, 98 PXA2xxMMCIState *pxa2xx_mmci_init(target_phys_addr_t base, 105 PXA2xxPCMCIAState *pxa2xx_pcmcia_init(target_phys_addr_t base); 116 PXA2xxKeyPadState *pxa27x_keypad_init(target_phys_addr_t base [all...] |
pci_host.h | 47 (target_phys_addr_t)addr, val); 59 (target_phys_addr_t)addr, val); 71 (target_phys_addr_t)addr, val); 85 (target_phys_addr_t)addr, val); 97 (target_phys_addr_t)addr, val); 112 (target_phys_addr_t)addr, val);
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pc.h | 12 SerialState *serial_mm_init (target_phys_addr_t base, int it_shift, 15 uint32_t serial_mm_readb (void *opaque, target_phys_addr_t addr); 16 void serial_mm_writeb (void *opaque, target_phys_addr_t addr, uint32_t value); 17 uint32_t serial_mm_readw (void *opaque, target_phys_addr_t addr); 18 void serial_mm_writew (void *opaque, target_phys_addr_t addr, uint32_t value); 19 uint32_t serial_mm_readl (void *opaque, target_phys_addr_t addr); 20 void serial_mm_writel (void *opaque, target_phys_addr_t addr, uint32_t value); 26 ParallelState *parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq, CharDriverState *chr); 85 target_phys_addr_t base, ram_addr_t size, 86 target_phys_addr_t mask) [all...] |
sysbus.c | 34 void sysbus_mmio_map(SysBusDevice *dev, int n, target_phys_addr_t addr) 42 if (dev->mmio[n].addr != (target_phys_addr_t)-1) { 78 void sysbus_init_mmio(SysBusDevice *dev, target_phys_addr_t size, int iofunc) 89 void sysbus_init_mmio_cb(SysBusDevice *dev, target_phys_addr_t size, 129 target_phys_addr_t addr, ...) 140 if (addr != (target_phys_addr_t)-1) {
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fw_cfg.h | 36 target_phys_addr_t crl_addr, target_phys_addr_t data_addr);
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goldfish_memlog.c | 24 static uint32_t memlog_read(void *opaque, target_phys_addr_t offset) 33 static void memlog_write(void *opaque, target_phys_addr_t offset, uint32_t val)
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armv7m.c | 27 static uint32_t bitband_readb(void *opaque, target_phys_addr_t offset) 34 static void bitband_writeb(void *opaque, target_phys_addr_t offset, 50 static uint32_t bitband_readw(void *opaque, target_phys_addr_t offset) 62 static void bitband_writew(void *opaque, target_phys_addr_t offset, 79 static uint32_t bitband_readl(void *opaque, target_phys_addr_t offset) 91 static void bitband_writel(void *opaque, target_phys_addr_t offset,
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arm_boot.c | 62 int initrd_size, target_phys_addr_t base) 64 target_phys_addr_t p; 115 int initrd_size, target_phys_addr_t base) 117 target_phys_addr_t p; 194 target_phys_addr_t entry;
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fw_cfg.c | 119 static uint32_t fw_cfg_mem_readb(void *opaque, target_phys_addr_t addr) 124 static void fw_cfg_mem_writeb(void *opaque, target_phys_addr_t addr, 130 static void fw_cfg_mem_writew(void *opaque, target_phys_addr_t addr, 254 target_phys_addr_t ctl_addr, target_phys_addr_t data_addr)
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goldfish_timer.c | 76 static uint32_t goldfish_timer_read(void *opaque, target_phys_addr_t offset) 91 static void goldfish_timer_write(void *opaque, target_phys_addr_t offset, uint32_t value_ns) 160 static uint32_t goldfish_rtc_read(void *opaque, target_phys_addr_t offset) 175 static void goldfish_rtc_write(void *opaque, target_phys_addr_t offset, uint32_t value)
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pckbd.c | 126 target_phys_addr_t mask; 390 static uint32_t kbd_mm_readb (void *opaque, target_phys_addr_t addr) 400 static void kbd_mm_writeb (void *opaque, target_phys_addr_t addr, uint32_t value) 423 target_phys_addr_t base, ram_addr_t size, 424 target_phys_addr_t mask)
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