| /prebuilt/linux-x86/toolchain/arm-linux-androideabi-4.4.x/lib/gcc/arm-linux-androideabi/4.4.3/plugin/include/ada/gcc-interface/ |
| ada-tree.def | 34 it is never passed to GCC. The only field used is operand 0, which
40 /* An expression that returns an RTL suitable for its type. Operand 0
52 /* Same as ADDR_EXPR, except that if the operand represents a bit field,
61 makes this tree node, whose operand is a statement. The latter inserts
|
| /external/chromium/sdch/open-vcdiff/src/ |
| rolling_hash.h | 41 // Returns operand % kBase, assuming that kBase is a power of two.
42 static inline uint32_t ModBase(uint32_t operand) {
43 return operand & (kBase - 1);
46 // Given an unsigned integer "operand", returns an unsigned integer "result"
50 // ModBase(operand + result) == 0
51 static inline uint32_t FindModBaseInverse(uint32_t operand) {
52 // The subtraction (0 - operand) produces an unsigned underflow for any
53 // operand except 0. The underflow results in a (very large) unsigned
58 // The C++ mod operation (operand % kBase) may produce different results for
59 // different compilers if operand is negative. That is not a problem i
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| /external/llvm/include/llvm/MC/ |
| MCInstrItineraries.h | 11 // itineraries, stages, and operand reads/writes. This is used by
101 unsigned FirstOperandCycle; ///< Index of first operand rd/wr
102 unsigned LastOperandCycle; ///< Index of last + 1 operand rd/wr
113 const unsigned *OperandCycles; ///< Array of operand cycles selected
180 /// operand. Return -1 if no cycle is specified for the operand.
196 /// value produced by an instruction of itinerary class DefClass, operand
198 /// itinerary class UseClass, operand index UseIdx.
217 /// getOperandLatency - Compute and return the use operand latency of a given
218 /// itinerary class and operand index if the value is produced by a
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| MCInst.h | 34 kRegister, ///< Register operand.
35 kImmediate, ///< Immediate operand.
36 kFPImmediate, ///< Floating-point immediate operand.
37 kExpr ///< Relocatable immediate operand.
59 assert(isReg() && "This is not a register operand!");
65 assert(isReg() && "This is not a register operand!");
|
| /external/llvm/lib/Target/PTX/ |
| PTXISelDAGToDAG.cpp | 56 bool isImm(const SDValue &operand);
57 bool SelectImm(const SDValue &operand, SDValue &imm);
197 // Match memory operand of the form [reg+reg]
211 // Match memory operand of the form [reg], [imm+reg], and [reg+imm]
286 // Match memory operand of the form [imm+imm] and [imm]
307 // Match memory operand of the form [reg], [imm+reg], and [reg+imm]
337 bool PTXDAGToDAGISel::isImm(const SDValue &operand) {
338 return ConstantSDNode::classof(operand.getNode());
341 bool PTXDAGToDAGISel::SelectImm(const SDValue &operand, SDValue &imm) {
342 SDNode *node = operand.getNode()
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| /external/v8/src/x64/ |
| builtins-x64.cc | 132 __ cmpq(Operand(kScratchRegister, 0), Immediate(0));
190 __ movq(Operand(rbx, JSObject::kMapOffset), rax);
192 __ movq(Operand(rbx, JSObject::kPropertiesOffset), rcx);
193 __ movq(Operand(rbx, JSObject::kElementsOffset), rcx);
205 __ lea(rcx, Operand(rbx, JSObject::kHeaderSize));
208 __ movq(Operand(rcx, 0), rdx);
260 __ movq(Operand(rdi, HeapObject::kMapOffset), rcx); // setup the map
262 __ movq(Operand(rdi, FixedArray::kLengthOffset), rdx); // and length
271 __ lea(rcx, Operand(rdi, FixedArray::kHeaderSize));
274 __ movq(Operand(rcx, 0), rdx)
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| /external/apache-xml/src/main/java/org/apache/xpath/operations/ |
| Gt.java | 37 * @param left non-null reference to the evaluated left operand.
38 * @param right non-null reference to the evaluated right operand.
|
| Gte.java | 37 * @param left non-null reference to the evaluated left operand.
38 * @param right non-null reference to the evaluated right operand.
|
| Lt.java | 37 * @param left non-null reference to the evaluated left operand.
38 * @param right non-null reference to the evaluated right operand.
|
| Lte.java | 37 * @param left non-null reference to the evaluated left operand.
38 * @param right non-null reference to the evaluated right operand.
|
| NotEquals.java | 37 * @param left non-null reference to the evaluated left operand.
38 * @param right non-null reference to the evaluated right operand.
|
| Quo.java | 40 * @param left non-null reference to the evaluated left operand.
41 * @param right non-null reference to the evaluated right operand.
|
| /external/clang/test/CXX/expr/expr.mptr.oper/ |
| p6-0x.cpp | 10 // program is ill-formed if the second operand is a pointer to member
13 // ill-formed if the second operand is a pointer to member function
|
| /external/collada/src/1.4/dom/ |
| domGles_texcombiner_argumentAlpha_type.cpp | 50 // Add attribute: operand
53 ma->setName( "operand" );
|
| domGles_texcombiner_argumentRGB_type.cpp | 50 // Add attribute: operand
53 ma->setName( "operand" );
|
| /external/skia/gpu/src/ |
| GrGpuGLFixed.h | 49 // environment rgb operand 0 to be GL_COLOR to modulate each incoming
51 // set the operand to GL_ALPHA so that the incoming frag's R, G, &B are all
|
| /external/v8/src/mips/ |
| codegen-mips-inl.h | 48 // additional operands: Register src1, const Operand& src2.
50 __ Branch(&entry_label_, cond, zero_reg, Operand(0));
|
| virtual-frame-mips.cc | 60 const Operand& r2) {
68 const Operand& r2) {
77 const Operand& r2) {
273 void VirtualFrame::EmitPush(Operand operand, TypeInfo info) {
278 void VirtualFrame::EmitPush(MemOperand operand, TypeInfo info) {
|
| /external/v8/src/ia32/ |
| stub-cache-ia32.cc | 56 __ mov(extra, Operand::StaticArray(offset, times_2, value_offset));
59 __ cmp(name, Operand::StaticArray(offset, times_2, key_offset));
69 __ add(Operand(extra), Immediate(Code::kHeaderSize - kHeapObjectTag));
70 __ jmp(Operand(extra));
78 __ cmp(name, Operand::StaticArray(offset, times_2, key_offset));
82 __ mov(offset, Operand::StaticArray(offset, times_2, value_offset));
92 __ mov(offset, Operand::StaticArray(offset, times_2, value_offset));
95 __ add(Operand(offset), Immediate(Code::kHeaderSize - kHeapObjectTag));
96 __ jmp(Operand(offset));
169 __ and_(Operand(index)
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| /external/v8/src/ |
| lithium-allocator.cc | 82 UsePosition::UsePosition(LifetimePosition pos, LOperand* operand)
83 : operand_(operand),
191 void LiveRange::SetSpillOperand(LOperand* operand) {
192 ASSERT(!operand->IsUnallocated());
195 spill_operand_->ConvertTo(operand->kind(), operand->index());
448 LOperand* operand) {
452 UsePosition* use_pos = new UsePosition(pos, operand);
482 use_pos->operand()->ConvertTo(op->kind(), op->index());
619 LOperand* LAllocator::AllocateFixed(LUnallocated* operand,
1016 LOperand* operand = NULL; local
1400 LOperand* operand = cur->CreateAssignedOperand(); local
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| /external/llvm/lib/Target/X86/ |
| X86ISelLowering.h | 89 /// X86 SetCC. Operand 0 is condition code, and operand 1 is the EFLAGS
90 /// operand, usually produced by a CMP instruction.
106 /// X86 conditional moves. Operand 0 and operand 1 are the two values
107 /// to select from. Operand 2 is the condition code, and operand 3 is the
108 /// flag operand produced by a CMP or TEST instruction. It also writes a
112 /// X86 conditional branches. Operand 0 is the chain operand, operand
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| /external/llvm/include/llvm/Analysis/ |
| IVUsers.h | 35 /// instruction of the operand, and 'OperandValToReplace' is the operand of
54 /// getOperandValToReplace - Return the Value of the operand in the user
60 /// setOperandValToReplace - Assign a new Value as the operand value
80 /// OperandValToReplace - The Value of the operand in the user instruction
150 IVStrideUse &AddUser(Instruction *User, Value *Operand);
|
| /external/llvm/lib/CodeGen/ |
| MachineInstr.cpp | 49 /// AddRegOperandToRegInfo - Add this register operand to the specified
53 assert(isReg() && "Can only add reg operand to use lists");
63 // Otherwise, add this operand to the head of the registers use/def list.
83 /// RemoveRegOperandFromRegInfo - Remove this register operand from the
86 assert(isOnRegUseList() && "Reg operand is not on a use list");
101 // Otherwise, we have to change the register. If this operand is embedded
138 /// ChangeToImmediate - Replace this operand with a new immediate operand of
139 /// the specified value. If an operand is known to be an immediate already,
142 // If this operand is currently a register operand, and if this is in
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| /dalvik/docs/ |
| java-constraints.html | 351 <code>CONSTANT_Interface_Methodref</code>. The third operand must
352 specify number of local variables and the fourth operand must always
434 dimensions operand must not be <code>0</code>
471 The index operand of instructions explicitly referencing single-width
491 The index operand of instructions implicitly referencing single-width
511 The index operand of instructions explicitly referencing double-width
531 The index operand of instructions implicitly referencing double-width
551 The index operand of <code>wide</code> instructions explicitly
571 The index operand of <code>wide</code> instructions explicitly
640 The operand stack must have the same depth for all executions path
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| /external/v8/src/arm/ |
| assembler-arm.h | 372 // Class Operand represents a shifter operand in data processing instructions
373 class Operand BASE_EMBEDDED {
376 INLINE(explicit Operand(int32_t immediate,
378 INLINE(explicit Operand(const ExternalReference& f));
379 INLINE(explicit Operand(const char* s));
380 explicit Operand(Handle<Object> handle);
381 INLINE(explicit Operand(Smi* value));
384 INLINE(explicit Operand(Register rm));
387 explicit Operand(Register rm, ShiftOp shift_op, int shift_imm)
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