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  /frameworks/base/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/
omxVCM4P10_DequantTransformResidualFromPairAndAdd_s.S 47 BEQ L1
49 L1:
armVCM4P10_DecodeCoeffsToPair_s.S 34 BCC L1
36 L1:
  /libcore/luni/src/test/java/libcore/java/lang/
ClassCastExceptionTest.java 158 A1, B1, C1, D1, E1, F1, G1, H1, I1, J1, K1, L1, M1, N1, O1, P1, Q1, R1, S1, T1, U1, V1, W1, X1, Y1, Z1,
163 A1, B1, C1, D1, E1, F1, G1, H1, I1, J1, K1, L1, M1, N1, O1, P1, Q1, R1, S1, T1, U1, V1, W1, X1, Y1, Z1,
  /external/oprofile/events/i386/westmere/
unit_masks 110 0x01 repl L1 data cache lines allocated
119 0x01 i_state L1 writebacks to L2 in I state (misses)
120 0x02 s_state L1 writebacks to L2 in S state
121 0x04 e_state L1 writebacks to L2 in E state
122 0x08 m_state L1 writebacks to L2 in M state
123 0x0f mesi All L1 writebacks to L2
204 0x01 l1d_hit Retired loads that hit the L1 data cache (Precise Event)
223 0x40 l1d_writeback Offcore L1 data cache writebacks
  /external/llvm/test/MC/X86/
x86-32.s 444 L1:
445 jcxz L1
446 // CHECK: jcxz L1
448 jecxz L1
449 // CHECK: jecxz L1
x86-64.s 765 L1:
766 jecxz L1
767 // CHECK: jecxz L1
769 jrcxz L1
770 // CHECK: jrcxz L1
  /external/opencv/cv/src/
cvoptflowlk.cpp 284 int L1 = i - 1;
290 if( L1 < 0 )
291 L1 = 0;
300 Line1 = L1 * imgStep;
  /external/oprofile/events/i386/nehalem/
events 42 event:0x28 counters:0,1,2,3 um:l1d_wb_l2 minimum:500 name:L1D_WB_L2 : Counts number of L1 writebacks to the L2.
46 event:0x40 counters:0,1 um:l1d_cache_ld minimum:6000 name:L1D_CACHE_LD : Counts L1 data cache read requests.
47 event:0x41 counters:0,1 um:l1d_cache_st minimum:6000 name:L1D_CACHE_ST : Counts L1 data cache stores.
49 event:0x43 counters:0,1 um:l1d_all_ref minimum:6000 name:L1D_ALL_REF : Counts all references to the L1 data cache,
51 event:0x4B counters:0,1,2,3 um:sse_mem_exec minimum:6000 name:SSE_MEM_EXEC : Counts number of SSE instructions which missed the L1 data cache.
52 event:0x4C counters:0,1,2,3 um:one minimum:6000 name:LOAD_HIT_PRE : Counts load operations sent to the L1 data cache while a previous SSE prefetch instruction to the same cache line has started prefetching but has not yet finished.
56 event:0x51 counters:0,1 um:l1d minimum:6000 name:L1D : Counts the number of lines brought from/to the L1 data cache.
60 event:0x63 counters:0,1 um:cache_lock_cycles minimum:6000 name:CACHE_LOCK_CYCLES : Cycle count during which the L1/L2 caches are locked. A lock is asserted when there is a locked memory access, due to uncacheable memory, a locked operation that spans two cache lines, or a page walk from an uncacheable page table.
  /external/stlport/src/
locale.cpp 294 // come from L1, and all those that are in category c come from L2.
295 locale::locale(const locale& L1, const locale& L2, category c)
297 _Locale_impl* impl = new _Locale_impl(*L1._M_impl);
301 if (L1.name() != _Nameless && L2.name() != _Nameless)
302 _Stl_loc_combine_names(impl, L1._M_impl->name.c_str(), L2._M_impl->name.c_str(), c);
  /external/webkit/LayoutTests/dom/xhtml/level3/core/
documentnormalizedocument13.js 81 Add a L1 attribute to a L2 namespace aware document and perform namespace normalization. Should result
125 elem.setAttribute("title","DOM L1 Attribute");
  /ndk/sources/cxx-stl/stlport/src/
locale.cpp 294 // come from L1, and all those that are in category c come from L2.
295 locale::locale(const locale& L1, const locale& L2, category c)
297 _Locale_impl* impl = new _Locale_impl(*L1._M_impl);
301 if (L1.name() != _Nameless && L2.name() != _Nameless)
302 _Stl_loc_combine_names(impl, L1._M_impl->name.c_str(), L2._M_impl->name.c_str(), c);
  /bionic/libm/src/
e_pow.c 75 L1 = 5.99999999999994648725e-01, /* 0x3FE33333, 0x33333303 */
232 r = s2*s2*(L1+s2*(L2+s2*(L3+s2*(L4+s2*(L5+s2*L6)))));
e_powf.c 34 L1 = 6.0000002384e-01, /* 0x3f19999a */
175 r = s2*s2*(L1+s2*(L2+s2*(L3+s2*(L4+s2*(L5+s2*L6)))));
  /external/bison/src/
reader.c 137 merger_list *L1 = L0->next;
139 L0 = L1;
  /external/fdlibm/
e_pow.c 78 L1 = 5.99999999999994648725e-01, /* 0x3FE33333, 0x33333303 */
236 r = s2*s2*(L1+s2*(L2+s2*(L3+s2*(L4+s2*(L5+s2*L6)))));
  /external/oprofile/events/x86-64/family11h/
events 44 event:0x45 counters:0,1,2,3 um:zero minimum:500 name:L1_DTLB_MISS_AND_L2_DTLB_HIT : L1 DTLB misses and L2 DTLB hits
45 event:0x46 counters:0,1,2,3 um:zero minimum:500 name:L1_DTLB_AND_L2_DTLB_MISS : L1 and L2 DTLB misses
68 event:0x84 counters:0,1,2,3 um:zero minimum:500 name:L1_ITLB_MISS_AND_L2_ITLB_HIT : L1 ITLB miss and L2 ITLB hit
69 event:0x85 counters:0,1,2,3 um:zero minimum:500 name:L1_ITLB_MISS_AND_L2_ITLB_MISS : L1 ITLB miss and L2 ITLB miss
  /external/oprofile/events/x86-64/hammer/
events 44 event:0x45 counters:0,1,2,3 um:zero minimum:500 name:L1_DTLB_MISS_AND_L2_DTLB_HIT : L1 DTLB misses and L2 DTLB hits
45 event:0x46 counters:0,1,2,3 um:zero minimum:500 name:L1_DTLB_AND_L2_DTLB_MISS : L1 and L2 DTLB misses
68 event:0x84 counters:0,1,2,3 um:zero minimum:500 name:L1_ITLB_MISS_AND_L2_ITLB_HIT : L1 ITLB miss and L2 ITLB hit
69 event:0x85 counters:0,1,2,3 um:zero minimum:500 name:L1_ITLB_MISS_AND_L2_ITLB_MISS : L1 ITLB miss and L2 ITLB miss
  /external/qemu/distrib/sdl-1.2.12/src/video/
e_pow.h 74 L1 = 5.99999999999994648725e-01, /* 0x3FE33333, 0x33333303 */
226 r = s2*s2*(L1+s2*(L2+s2*(L3+s2*(L4+s2*(L5+s2*L6)))));
  /frameworks/base/media/libstagefright/codecs/avc/enc/src/
rate_control.cpp 172 double L1, L2, L3, bpp;
252 L1 = 0.1;
258 L1 = 0.2;
264 L1 = 0.6;
271 if (bpp <= L1)
    [all...]
  /external/clang/test/SemaTemplate/
instantiate-expr-2.cpp 101 Lookup<1> const &L1(False());
  /external/libffi/src/powerpc/
aix.S 155 L1:
darwin.S 108 L1:
  /external/opencv/cvaux/src/
cvmorphcontours.cpp 86 double L1,L2, L_min, dL;
88 L1 = sqrt( (double)P1->x*P1->x + P1->y*P1->y);
91 L_min = MIN(L1, L2);
92 dL = fabs( L1 - L2 );
  /external/oprofile/events/i386/atom/
unit_masks 40 0x21 ld L1 Cacheable Data Reads
41 0x22 st L1 Cacheable Data Writes
  /external/v8/test/cctest/
test-disasm-ia32.cc 266 Label L1, L2;
267 __ bind(&L1);
269 __ call(&L1);
282 __ jmp(&L1);

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