| /external/llvm/lib/MC/MCDisassembler/ |
| EDDisassembler.cpp | 345 int EDDisassembler::parseInst(SmallVectorImpl<MCParsedAsmOperand*> &operands,
388 TargetParser->ParseInstruction(instName, instLoc, operands))
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| /dalvik/vm/compiler/template/out/ |
| CompilerTemplateAsm-armv5te.S | 508 * on what value we'd like to return when one of the operands is NaN.
515 push {r0-r3} @ save operands
522 add sp, #16 @ drop unused operands
529 pop {r2-r3} @ restore operands in reverse order
530 pop {r0-r1} @ restore operands in reverse order
552 * on what value we'd like to return when one of the operands is NaN.
559 push {r0-r3} @ save operands
566 add sp, #16 @ drop unused operands
573 pop {r2-r3} @ restore operands in reverse order
574 pop {r0-r1} @ restore operands in reverse orde
[all...] |
| /external/llvm/lib/VMCore/ |
| Instructions.cpp | 59 /// areInvalidOperands - Return a string if the specified operands are invalid
137 /// growOperands - grow operands - This grows the operand list in response
228 /// growOperands - grow operands - This grows the operand list in response to a
781 assert(BI.getNumOperands() == 3 && "BR can have 1 or 3 operands!");
[all...] |
| /external/mesa3d/src/glsl/ |
| ir_clone.cpp | 164 ir_rvalue *op[Elements(this->operands)] = { NULL, };
168 op[i] = this->operands[i]->clone(mem_ctx, ht);
|
| opt_tree_grafting.cpp | 215 if (do_graft(&ir->operands[i]))
|
| ir_hv_accept.cpp | 146 switch (this->operands[i]->accept(v)) {
|
| ir_print_visitor.cpp | 179 ir->operands[i]->accept(this);
|
| /external/v8/test/mjsunit/regress/ |
| regress-406.js | 35 // The and and or truth tables with both operands constant.
|
| /external/llvm/lib/Target/X86/Disassembler/ |
| X86DisassemblerDecoder.c | 295 * address, and other relevant data sizes to report operands correctly.
1065 * up if we're using (say) XMM or 8-bit register operands. That gets fixed in
[all...] |
| X86DisassemblerDecoderCommon.h | 79 "operands change width") \
81 "but not the operands") \
83 "but not the operands") \
85 "operands change width") \
87 "operands change width") \
88 ENUM_ENTRY(IC_64BIT_REXW, 4, "requires a REX.W prefix, so operands "\
102 "operands' meaning") \
206 * Physical encodings of instruction operands.
247 * Semantic interpretations of instruction operands.
363 * its operands
368 struct OperandSpecifier operands[X86_MAX_OPERANDS]; member in struct:InstructionSpecifier
[all...] |
| /external/llvm/utils/TableGen/ |
| X86RecognizableInstr.cpp | 231 Operands = &insn.Operands.OperandList;
409 // Filter out instructions with subreg operands.
486 const std::vector<CGIOperandList::OperandInfo> &OperandList = *Operands;
499 const std::vector<CGIOperandList::OperandInfo> &OperandList = *Operands;
527 Spec->operands[operandIndex].encoding = ENCODING_DUP;
528 Spec->operands[operandIndex].type =
533 const std::string &typeName = (*Operands)[operandIndex].Rec->getName();
535 Spec->operands[operandIndex].encoding = encodingFromString(typeName,
537 Spec->operands[operandIndex].type = typeFromString(typeName,
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| CodeGenDAGPatterns.h | 188 /// constraint to the nodes operands. This returns true if it makes a
211 /// getNumOperands - This is the number of operands required or -1 if
232 /// constraints for this node to the operands of the node. This returns
593 std::vector<Record*> Operands;
599 const std::vector<Record*> &operands,
601 : Pattern(TP), Results(results), Operands(operands),
606 unsigned getNumOperands() const { return Operands.size(); }
618 assert(ON < Operands.size());
619 return Operands[ON]
[all...] |
| X86DisassemblerTables.cpp | 454 .operands[operandIndex]
458 .operands[operandIndex]
|
| /external/llvm/examples/OCaml-Kaleidoscope/Chapter6/ |
| parser.ml | 173 then raise (Stream.Error "invalid number of operands for operator")
|
| /external/v8/test/mjsunit/ |
| constant-folding.js | 30 // Test the code generated when operands are known at compile time
|
| /dalvik/vm/compiler/codegen/arm/ |
| CodegenDriver.cpp | 213 insn->operands[0] = dest;
214 insn->operands[1] = src1;
895 /* Deduce sizes of operands */
[all...] |
| ArmLIR.h | 49 * r0, r1, r2, r3 to hold operands/results
53 * r0, r1, r2, r3, r8, r9, r10, r11, r12, r14 for operands/results
55 * s16-s31/d8-d15 for operands/results
766 int operands[4]; \/\/ [0..3] = [dest, src1, src2, extra] member in struct:ArmLIR
[all...] |
| /external/llvm/test/MC/ARM/ |
| arm-arithmetic-aliases.s | 67 @ Also check that we handle the predicate and cc_out operands.
|
| thumb-diagnostics.s | 91 @ Mismatched source/destination operands for MUL instruction.
|
| /dalvik/vm/compiler/codegen/arm/armv7-a-neon/ |
| MethodCodegenDriver.cpp | 247 labelList[blockId].operands[0] = bb->startOffset;
|
| /external/v8/src/ |
| lithium.h | 243 // We clear both operands to indicate move that's been eliminated.
413 const ZoneList<LOperand*>* operands() const { return &pointer_operands_; } function in class:v8::internal::LPointerMap
502 // Allocation index indexed arrays of spill slot operands for registers
514 // Iterates over the non-null, non-constant operands in an environment.
557 // Iterator for non-null, non-constant operands incl. outer environments.
|
| /external/llvm/examples/OCaml-Kaleidoscope/Chapter7/ |
| parser.ml | 199 then raise (Stream.Error "invalid number of operands for operator")
|
| /external/llvm/test/MC/MBlaze/ |
| mblaze_operands.s | 3 # Test to ensure that all register and immediate operands can be parsed by
|
| /prebuilt/linux-x86/toolchain/arm-eabi-4.4.0/lib/gcc/arm-eabi/4.4.0/plugin/include/ |
| tree.h | 268 /* Number of operands and names for each clause. */
820 &__t->exp.operands[__i]; }))
830 &__t->exp.operands[__i]; }))
841 &__t->exp.operands[__i]; }))
921 #define TREE_OPERAND_CHECK(T, I) ((T)->exp.operands[I])
922 #define TREE_OPERAND_CHECK_CODE(T, CODE, I) ((T)->exp.operands[I])
923 #define TREE_RTL_OPERAND_CHECK(T, CODE, I) (*(rtx *) &((T)->exp.operands[I]))
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| /prebuilt/linux-x86/toolchain/arm-eabi-4.4.3/lib/gcc/arm-eabi/4.4.3/plugin/include/ |
| tree.h | 268 /* Number of operands and names for each clause. */
828 &__t->exp.operands[__i]; }))
838 &__t->exp.operands[__i]; }))
849 &__t->exp.operands[__i]; }))
929 #define TREE_OPERAND_CHECK(T, I) ((T)->exp.operands[I])
930 #define TREE_OPERAND_CHECK_CODE(T, CODE, I) ((T)->exp.operands[I])
931 #define TREE_RTL_OPERAND_CHECK(T, CODE, I) (*(rtx *) &((T)->exp.operands[I]))
[all...] |
