/frameworks/base/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/ |
armVCM4P10_TransformResidual4x4_s.S | 20 VSUB.I16 d6,d0,d2 23 VSUB.I16 d7,d7,d3 27 VSUB.I16 d2,d6,d7 28 VSUB.I16 d3,d5,d8 33 VSUB.I16 d6,d0,d2 36 VSUB.I16 d7,d7,d3 40 VSUB.I16 d2,d6,d7 41 VSUB.I16 d3,d5,d8
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omxVCM4P10_TransformDequantLumaDCFromPair_s.S | 23 VSUB.I16 d6,d0,d1 25 VSUB.I16 d7,d2,d3 28 VSUB.I16 d1,d4,d5 29 VSUB.I16 d2,d6,d7 37 VSUB.I16 d6,d0,d1 38 VSUB.I16 d7,d2,d3 40 VSUB.I16 d1,d4,d5 41 VSUB.I16 d2,d6,d7
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omxVCM4P10_DequantTransformResidualFromPairAndAdd_s.S | 60 VSUB.I16 d6,d0,d2 63 VSUB.I16 d7,d7,d3 67 VSUB.I16 d2,d6,d7 68 VSUB.I16 d3,d5,d8 73 VSUB.I16 d6,d0,d2 76 VSUB.I16 d7,d7,d3 80 VSUB.I16 d2,d6,d7 81 VSUB.I16 d3,d5,d8
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armVCM4P10_InterpolateLuma_HalfDiagHorVer4x4_unsafe_s.S | 40 VSUB.I16 d10,d10,d8 52 VSUB.I16 d12,d12,d8 64 VSUB.I16 d14,d14,d8 76 VSUB.I16 d16,d16,d8 88 VSUB.I16 d18,d18,d8 100 VSUB.I16 d20,d20,d8 112 VSUB.I16 d22,d22,d8 123 VSUB.I16 d24,d24,d8 131 VSUB.I16 d26,d26,d8 138 VSUB.I32 q5,q5,q [all...] |
armVCM4P10_InterpolateLuma_HalfHor4x4_unsafe_s.S | 35 VSUB.I16 d22,d22,d8 47 VSUB.I16 d24,d24,d8 59 VSUB.I16 d26,d26,d8
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/external/llvm/test/CodeGen/ARM/ |
fsubs.ll | 11 ; VFP2: vsub.f32 s0, s1, s0 12 ; NFP1: vsub.f32 d0, d1, d0 13 ; NFP0: vsub.f32 s0, s1, s0
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fmscs.ll | 15 ; A8: vsub.f32 31 ; A8: vsub.f64
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fnmacs.ll | 15 ; A8: vsub.f32 31 ; A8: vsub.f64
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fnmscs.ll | 16 ; A8: vsub.f32 d{{[0-9]}}, d{{[0-9]}}, d{{[0-9]}} 33 ; A8: vsub.f32 d{{[0-9]}}, d{{[0-9]}}, d{{[0-9]}} 50 ; A8: vsub.f64 d1{{[67]}}, d1{{[67]}}, d1{{[67]}} 67 ; A8: vsub.f64 d1{{[67]}}, d1{{[67]}}, d1{{[67]}}
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vsub.ll | 5 ;CHECK: vsub.i8 14 ;CHECK: vsub.i16 23 ;CHECK: vsub.i32 32 ;CHECK: vsub.i64 41 ;CHECK: vsub.f32 50 ;CHECK: vsub.i8 59 ;CHECK: vsub.i16 68 ;CHECK: vsub.i32 77 ;CHECK: vsub.i64 86 ;CHECK: vsub.f3 [all...] |
/external/libvpx/vp8/encoder/arm/neon/ |
vp8_shortwalsh4x4_neon.asm | 36 vsub.s16 d8, d3, d4 ;c1 = ip[1]-ip[2] 37 vsub.s16 d9, d2, d5 ;d1 = ip[0]-ip[3] 40 vsub.s16 d4, d6, d7 ;op[2] = a1 - b1 42 vsub.s16 d5, d9, d8 ;op[3] = d1 - c1 53 vsub.s16 d8, d3, d4 ;c1 = ip[4]-ip[8] 54 vsub.s16 d9, d2, d5 ;d1 = ip[0]-ip[12] 57 vsub.s16 d4, d6, d7 ;c2 = a1 - b1; 59 vsub.s16 d5, d9, d8 ;d2 = d1 - c1; 64 vsub.s16 q1, q1, q3 65 vsub.s16 q2, q2, q [all...] |
fastfdct8x4_neon.asm | 52 vsub.s16 d12, d4, d6 ;ip[1]-ip[2] 53 vsub.s16 d13, d2, d8 ;ip[0]-ip[3] 56 vsub.s16 d24, d5, d7 57 vsub.s16 d25, d3, d9 65 vsub.s16 d15, d10, d11 ;temp2 = a1 - b1 67 vsub.s16 d25, d2, d3 91 vsub.s16 d8, d19, d20 ;op[3] = temp1 - temp2 92 vsub.s16 d9, d29, d30 ;op[3] = temp1 - temp2 108 vsub.s16 d12, d4, d6 ;c1 = ip[4]-ip[8] 109 vsub.s16 d13, d2, d8 ;d1 = ip[0]-ip[12 [all...] |
fastfdct4x4_neon.asm | 47 vsub.s16 d8, d3, d4 ;ip[1]-ip[2] 48 vsub.s16 d9, d2, d5 ;ip[0]-ip[3] 53 vsub.s16 d11, d6, d7 ;temp2 = a1 - b1 67 vsub.s16 d5, d15, d16 ;op[3] = temp1 - temp2 78 vsub.s16 d8, d3, d4 ;c1 = ip[4]-ip[8] 79 vsub.s16 d9, d2, d5 ;d1 = ip[0]-ip[12] 82 vsub.s16 d11, d6, d7 ;temp2 = a1 - b1 97 vsub.s16 d5, d15, d16 ;d2 = temp1 - temp2 102 vsub.s16 q1, q1, q3 103 vsub.s16 q2, q2, q [all...] |
fastquantizeb_neon.asm | 78 vsub.s16 q4, q2 ; x1 = (y^sz) - sz = (y^sz) - (-1) (two's complement) 79 vsub.s16 q5, q3
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/external/libvpx/vp8/common/arm/neon/ |
iwalsh_neon.asm | 29 vsub.s16 d6, d1, d2 ;c = [4] - [8] 30 vsub.s16 d7, d0, d3 ;d = [0] - [12] 34 vsub.s16 d2, d4, d5 ;a - b 35 vsub.s16 d3, d7, d6 ;d - c 51 vsub.s16 d6, d1, d2 ;c = [1] - [2] 52 vsub.s16 d7, d0, d3 ;d = [0] - [3] 56 vsub.s16 d2, d4, d5 ;g = a - b 57 vsub.s16 d3, d7, d6 ;h = d - c
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/frameworks/base/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src/ |
armVCM4P10_TransformResidual4x4_s.s | 121 VSUB de1,dIn0,dIn2 ;// e1 = d0 - d2 124 VSUB de2,dIn1RS,dIn3 ;// e2 = (d1>>1) - d3 128 VSUB df2,de1,de2 ;// f2 = e1 - e2 129 VSUB df3,de0,de3 ;// f3 = e0 - e3 148 VSUB dg1,df0,df2 ;// e1 = d0 - d2 151 VSUB dg2,df1RS,df3 ;// e2 = (d1>>1) - d3 155 VSUB dh2,dg1,dg2 ;// f2 = e1 - e2 156 VSUB dh3,dg0,dg3 ;// f3 = e0 - e3
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omxVCM4P10_TransformDequantLumaDCFromPair_s.s | 140 VSUB dRowDiff1,dIn0,dIn1 142 VSUB dRowDiff2,dIn2,dIn3 145 VSUB dRowOp1,dRowSum1,dRowSum2 146 VSUB dRowOp2,dRowDiff1,dRowDiff2 164 VSUB dColDiff1,dRowOp0,dRowOp1 165 VSUB dColDiff2,dRowOp2,dRowOp3 167 VSUB dColOp1,dColSum1,dColSum2 168 VSUB dColOp2,dColDiff1,dColDiff2
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armVCM4P10_InterpolateLuma_HalfDiagHorVer4x4_unsafe_s.s | 126 VSUB dRes0, dRes0, dTmp0 ;// TeRi 143 VSUB dRes1, dRes1, dTmp0 160 VSUB dRes2, dRes2, dTmp0 177 VSUB dRes3, dRes3, dTmp0 194 VSUB dRes4, dRes4, dTmp0 211 VSUB dRes5, dRes5, dTmp0 228 VSUB dRes6, dRes6, dTmp0 244 VSUB dRes7, dRes7, dTmp0 258 VSUB dRes8, dRes8, dTmp0 270 VSUB qAcc01, qAcc01, qTmp [all...] |
omxVCM4P10_DequantTransformResidualFromPairAndAdd_s.s | 295 VSUB de1,dIn0,dIn2 ;// e1 = d0 - d2 298 VSUB de2,dIn1RS,dIn3 ;// e2 = (d1>>1) - d3 302 VSUB df2,de1,de2 ;// f2 = e1 - e2 303 VSUB df3,de0,de3 ;// f3 = e0 - e3 322 VSUB dg1,df0,df2 ;// e1 = d0 - d2 325 VSUB dg2,df1RS,df3 ;// e2 = (d1>>1) - d3 329 VSUB dh2,dg1,dg2 ;// f2 = e1 - e2 330 VSUB dh3,dg0,dg3 ;// f3 = e0 - e3
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/external/llvm/test/MC/ARM/ |
neon-sub-encoding.s | 3 @ CHECK: vsub.i8 d16, d17, d16 @ encoding: [0xa0,0x08,0x41,0xf3] 4 vsub.i8 d16, d17, d16 5 @ CHECK: vsub.i16 d16, d17, d16 @ encoding: [0xa0,0x08,0x51,0xf3] 6 vsub.i16 d16, d17, d16 7 @ CHECK: vsub.i32 d16, d17, d16 @ encoding: [0xa0,0x08,0x61,0xf3] 8 vsub.i32 d16, d17, d16 9 @ CHECK: vsub.i64 d16, d17, d16 @ encoding: [0xa0,0x08,0x71,0xf3] 10 vsub.i64 d16, d17, d16 11 @ CHECK: vsub.f32 d16, d16, d17 @ encoding: [0xa1,0x0d,0x60,0xf2] 12 vsub.f32 d16, d16, d1 [all...] |
/frameworks/base/media/libstagefright/codecs/aacenc/src/asm/ARMV7/ |
R4R8First_v7.s | 41 VSUB.S32 d5, d0, d1 @ r1 = buf[0] - buf[2]@i1 = buf[1] - buf[3]@ 42 VSUB.S32 d7, d2, d3 @ r2 = buf[4] - buf[6]@i2 = buf[5] - buf[7]@ 47 VSUB.S32 Q1, Q2, Q3 @ r5 = (r0 - r2)@i5 = (i0 - i2)@r6 = (r1 - i3)@i7 = (i1 - r3)@ 52 VSUB.S32 d7, d10, d11 @ r1 = buf[12] - buf[14]@i1 = buf[13] - buf[15]@ 55 VSUB.S32 d5, d8, d9 @ r3 = buf[ 8] - buf[10]@i3 = buf[ 9] - buf[11]@ 60 VSUB.S32 Q5, Q2, Q3 @ t2 = (r0 - r2) >> 1@t3 = (i0 - i2) >> 1@r0 = r1 - i3@i2 = i1 - r3@ 75 VSUB.S32 d16, d0, d8 77 VSUB.S32 d18, d2, d10 79 VSUB.S32 d4, d11, d9 89 VSUB.S32 d15, d3, d [all...] |
Radix4FFT_v7.s | 66 VSUB.S32 Q3, Q12, Q13 @ MULHIGH(cosx, t1) - MULHIGH(sinx, t0) 72 VSUB.S32 Q0, Q10, Q2 @ r0 = t0 - r2@ 73 VSUB.S32 Q1, Q11, Q3 @ r1 = t1 - r3@ 87 VSUB.S32 Q9, Q12, Q13 @ MULHIGH(cosx, t1) - MULHIGH(sinx, t0) 98 VSUB.S32 Q7, Q12, Q13 @ MULHIGH(cosx, t1) - MULHIGH(sinx, t0) 101 VSUB.S32 Q5, Q7, Q9 @ r5 = r7 - t1@ 102 VSUB.S32 Q6, Q8, Q6 @ r6 = t0 - r6@ 109 VSUB.S32 Q10, Q2, Q4 @ xptr[0] = r2 - r4@ 111 VSUB.S32 Q11, Q3, Q7 @ xptr[1] = r3 - r7@ 114 VSUB.S32 Q8, Q0, Q5 @ xptr[0] = r0 - r5 [all...] |
PrePostMDCT_v7.s | 53 VSUB.S32 Q1, Q12, Q13 @ *buf0++ = MULHIGH(cosa, ti1) - MULHIGH(sina, tr1)@ 64 VSUB.S32 Q1, Q12, Q13 @ MULHIGH(cosa, ti2) - MULHIGH(sina, tr2)@ 108 VSUB.S32 Q5, Q13, Q12 @ *buf1-- = MULHIGH(sina, tr1) - MULHIGH(cosa, ti1)@ 116 VSUB.S32 Q1, Q13, Q12 @ *buf0++ = MULHIGH(sina, tr2) - MULHIGH(cosa, ti2)@
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/frameworks/base/media/libstagefright/codecs/on2/h264dec/omxdl/arm11/api/ |
armCOMM_IDCT_s.h | 833 VSUB qXh5, qXi5, qXi7 ;// (i5-i7)/2 835 VSUB qXh2, qXi2, qXi3 ;// h2, h3 852 VSUB qXg6, qXh6, qXh7 853 VSUB qXg5, qXh5, qXg6 854 VSUB qXg4, qXh4, qXg5 862 VSUB qXf4, qXg3, qXg4 864 VSUB qXf5, qXg2, qXg5 866 VSUB qXf6, qXg1, qXg6 868 VSUB qXf7, qXg0, qXg7 [all...] |
/frameworks/base/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/api/ |
armCOMM_IDCT_s.h | 839 VSUB qXh5, qXi5, qXi7 ;// (i5-i7)/2 841 VSUB qXh2, qXi2, qXi3 ;// h2, h3 858 VSUB qXg6, qXh6, qXh7 859 VSUB qXg5, qXh5, qXg6 860 VSUB qXg4, qXh4, qXg5 868 VSUB qXf4, qXg3, qXg4 870 VSUB qXf5, qXg2, qXg5 872 VSUB qXf6, qXg1, qXg6 874 VSUB qXf7, qXg0, qXg7 [all...] |