Lines Matching refs:of
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
30 * a delay slot of a taken branch or a jump:
76 * Another R4600 erratum. Due to the lack of errata information the exact
82 #error Check setting of R4600_V1_INDEX_ICACHEOP_WAR for your platform
86 * Pleasures of the R4600 V1.x. Cite from the IDT R4600 V1.7 errata:
95 * four instructions that are not any kind of load or store
112 #error Check setting of R4600_V1_HIT_CACHEOP_WAR for your platform
128 #error Check setting of R4600_V2_HIT_CACHEOP_WAR for your platform
133 * lock up or read corrupted values of CP0 registers after it enters
137 * first thing in the exception handler, which breaks one of the
141 #error Check setting of R5432_CP0_INTERRUPT_WAR for your platform
145 * Workaround for the Sibyte M3 errata the text of which can be found at
149 * This will enable the use of a special TLB refill handler which does a
155 #error Check setting of BCM1250_M3_WAR for your platform
162 #error Check setting of SIBYTE_1956_WAR for your platform
169 * for that line can get stale data from the fill buffer instead of
178 #error Check setting of MIPS4K_ICACHE_REFILL_WAR for your platform
182 * Missing implicit forced flush of evictions caused by CACHE
197 #error Check setting of MIPS_CACHE_SYNC_WAR for your platform
208 #error Check setting of TX49XX_ICACHE_INDEX_INV_WAR for your platform
216 #error Check setting of RM9000_CDEX_SMP_WAR for your platform
222 * I-cache line worth of instructions being fetched may case spurious
226 #error Check setting of ICACHE_REFILLS_WORKAROUND_WAR for your platform
234 #error Check setting of R10000_LLSC_WAR for your platform
241 #error Check setting of MIPS34K_MISSED_ITLB_WAR for your platform
