Lines Matching refs:SELECT_CC
530 // isSetCCEquivalent - Return true if this node is a setcc, or is a select_cc
543 if (N.getOpcode() == ISD::SELECT_CC &&
1122 case ISD::SELECT_CC: return visitSELECT_CC(N);
3322 case ISD::SELECT_CC:
4053 // Check against MVT::Other for SELECT_CC, which is a workaround for targets
4054 // having to say they don't support SELECT_CC on every type the DAG knows
4056 if (TLI.isOperationLegalOrCustom(ISD::SELECT_CC, MVT::Other) &&
4057 TLI.isOperationLegalOrCustom(ISD::SELECT_CC, VT))
4058 return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(), VT,
4075 // fold select_cc lhs, rhs, x, x, cc -> x
4091 // Fold to a simpler select_cc
4093 return DAG.getNode(ISD::SELECT_CC, N->getDebugLoc(), N2.getValueType(),
4101 // fold select_cc into other things, such as min/max/abs
4392 // sext(setcc x, y, cc) -> (select_cc x, y, -1, 0, cc)
4688 // zext(setcc x,y,cc) -> select_cc x, y, 1, 0, cc
4868 // aext(setcc x,y,cc) -> select_cc x, y, 1, 0, cc
8066 // If we got a simplified select_cc node back from SimplifySelectCC, then
8070 // Check to see if we got a select_cc back (to turn into setcc/select).
8072 if (SCC.getOpcode() == ISD::SELECT_CC) {
8087 /// SimplifySelectOps - Given a SELECT or a SELECT_CC node, where LHS and RHS
8146 } else { // Otherwise SELECT_CC
8156 Addr = DAG.getNode(ISD::SELECT_CC, TheSelect->getDebugLoc(),
8215 // fold select_cc true, x, y -> x
8218 // fold select_cc false, x, y -> y
8293 // (select_cc setlt X, 0, A, 0) -> (and (sra X, (sub size(X), 1), A)
8334 // fold (select_cc seteq (and x, y), 0, 0, A) -> (and (shr (shl x)) A)
8336 // A plaintext description would be, we can turn the SELECT_CC into an AND
8448 // select_cc setg[te] X, 0, X, -X ->
8449 // select_cc setgt X, -1, X, -X ->
8450 // select_cc setl[te] X, 0, -X, X ->
8451 // select_cc setlt X, 1, -X, X ->
