Lines Matching defs:DestVT
192 unsigned ARMEmitIntExt(EVT SrcVT, unsigned SrcReg, EVT DestVT, bool isZExt);
1565 EVT DestVT = MVT::i32;
1566 SrcReg = ARMEmitIntExt(SrcVT, SrcReg, DestVT,
1733 EVT DestVT = TLI.getValueType(I->getType(), true);
1737 if (DestVT != MVT::i16 && DestVT != MVT::i8 && DestVT != MVT::i1)
1918 MVT DestVT = VA.getLocVT();
1919 Arg = ARMEmitIntExt(ArgVT, Arg, DestVT, /*isZExt*/false);
1921 ArgVT = DestVT;
1927 MVT DestVT = VA.getLocVT();
1928 Arg = ARMEmitIntExt(ArgVT, Arg, DestVT, /*isZExt*/true);
1930 ArgVT = DestVT;
2001 EVT DestVT = RVLocs[0].getValVT();
2002 const TargetRegisterClass* DstRC = TLI.getRegClassFor(DestVT);
2078 EVT DestVT = VA.getValVT();
2080 if (RVVT != DestVT) {
2084 assert(DestVT == MVT::i32 && "ARM should always ext to i32");
2089 SrcReg = ARMEmitIntExt(RVVT, SrcReg, DestVT, Outs[0].Flags.isZExt());
2441 EVT SrcVT, DestVT;
2443 DestVT = TLI.getValueType(I->getType(), true);
2447 if (DestVT != MVT::i16 && DestVT != MVT::i8 && DestVT != MVT::i1)
2459 unsigned ARMFastISel::ARMEmitIntExt(EVT SrcVT, unsigned SrcReg, EVT DestVT,
2461 if (DestVT != MVT::i32 && DestVT != MVT::i16 && DestVT != MVT::i8)
2511 EVT SrcVT, DestVT;
2513 DestVT = TLI.getValueType(DestTy, true);
2519 unsigned ResultReg = ARMEmitIntExt(SrcVT, SrcReg, DestVT, isZExt);
