Lines Matching full:opc
115 bool SelectLdStSOReg(SDValue N, SDValue &Base, SDValue &Offset, SDValue &Opc);
118 SDValue &Offset, SDValue &Opc);
120 SDValue &Opc) {
121 return SelectAddrMode2Worker(N, Base, Offset, Opc) == AM2_BASE;
125 SDValue &Opc) {
126 return SelectAddrMode2Worker(N, Base, Offset, Opc) == AM2_SHOP;
130 SDValue &Opc) {
131 SelectAddrMode2Worker(N, Base, Offset, Opc);
132 // return SelectAddrMode2ShOp(N, Base, Offset, Opc);
138 SDValue &Offset, SDValue &Opc);
140 SDValue &Offset, SDValue &Opc);
142 SDValue &Offset, SDValue &Opc);
145 SDValue &Offset, SDValue &Opc);
147 SDValue &Offset, SDValue &Opc);
174 SDValue &BaseReg, SDValue &Opc);
240 SDNode *SelectVTBL(SDNode *N, bool IsExt, unsigned NumVecs, unsigned Opc);
266 SDNode *SelectAtomic64(SDNode *Node, unsigned Opc);
308 static bool isOpcWithIntImmediate(SDNode *N, unsigned Opc, unsigned& Imm) {
309 return N->getOpcode() == Opc &&
393 SDValue &Opc,
409 Opc = CurDAG->getTargetConstant(ARM_AM::getSORegOpc(ShOpcVal, ShImmVal),
417 Opc,
436 Opc = CurDAG->getTargetConstant(ARM_AM::getSORegOpc(ShOpcVal, ShImmVal),
493 SDValue &Opc) {
509 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt,
580 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt, ShOpcVal),
593 SDValue &Opc) {
609 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt,
631 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(ARM_AM::add, 0,
654 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, RHSC,
665 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(ARM_AM::add, 0,
720 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt, ShOpcVal),
726 SDValue &Offset, SDValue &Opc) {
756 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, ShAmt, ShOpcVal),
762 SDValue &Offset, SDValue &Opc) {
773 Opc = CurDAG->getTargetConstant(Val, MVT::i32);
782 SDValue &Offset, SDValue &Opc) {
792 Opc = CurDAG->getTargetConstant(ARM_AM::getAM2Opc(AddSub, Val,
808 SDValue &Opc) {
813 Opc = CurDAG->getTargetConstant(ARM_AM::getAM3Opc(ARM_AM::sub, 0),MVT::i32);
824 Opc = CurDAG->getTargetConstant(ARM_AM::getAM3Opc(ARM_AM::add, 0),MVT::i32);
844 Opc = CurDAG->getTargetConstant(ARM_AM::getAM3Opc(AddSub, RHSC),MVT::i32);
850 Opc = CurDAG->getTargetConstant(ARM_AM::getAM3Opc(ARM_AM::add, 0), MVT::i32);
855 SDValue &Offset, SDValue &Opc) {
865 Opc = CurDAG->getTargetConstant(ARM_AM::getAM3Opc(AddSub, Val), MVT::i32);
870 Opc = CurDAG->getTargetConstant(ARM_AM::getAM3Opc(AddSub, 0), MVT::i32);
1156 SDValue &Opc) {
1170 Opc = getI32Imm(ARM_AM::getSORegOpc(ShOpcVal, ShImmVal));
1555 static unsigned getVLDSTRegisterUpdateOpcode(unsigned Opc) {
1556 switch (Opc) {
1596 return Opc; // If not one we handle, return it unchanged.
1656 unsigned Opc = (is64BitVector ? DOpcodes[OpcodeIndex] :
1665 Opc = getVLDSTRegisterUpdateOpcode(Opc);
1668 if ((NumVecs != 1 && NumVecs != 2 && Opc != ARM::VLD1q64wb_fixed) ||
1675 VLd = CurDAG->getMachineNode(Opc, dl, ResTys, Ops.data(), Ops.size());
1806 unsigned Opc = (is64BitVector ? DOpcodes[OpcodeIndex] :
1815 Opc = getVLDSTRegisterUpdateOpcode(Opc);
1818 if ((NumVecs > 2 && Opc != ARM::VST1q64wb_fixed) ||
1827 CurDAG->getMachineNode(Opc, dl, ResTys, Ops.data(), Ops.size());
1974 unsigned Opc = (is64BitVector ? DOpcodes[OpcodeIndex] :
1976 SDNode *VLdLn = CurDAG->getMachineNode(Opc, dl, ResTys,
2038 unsigned Opc = Opcodes[OpcodeIndex];
2063 CurDAG->getMachineNode(Opc, dl, ResTys, Ops.data(), Ops.size());
2080 unsigned Opc) {
2109 return CurDAG->getMachineNode(Opc, dl, VT, Ops.data(), Ops.size());
2117 unsigned Opc = isSigned ? (Subtarget->isThumb() ? ARM::t2SBFX : ARM::SBFX)
2143 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 5);
2166 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 5);
2180 unsigned Opc = 0;
2182 case ARM_AM::lsl: Opc = ARM::t2MOVCClsl; break;
2183 case ARM_AM::lsr: Opc = ARM::t2MOVCClsr; break;
2184 case ARM_AM::asr: Opc = ARM::t2MOVCCasr; break;
2185 case ARM_AM::ror: Opc = ARM::t2MOVCCror; break;
2193 return CurDAG->SelectNodeTo(N, Opc, MVT::i32,Ops, 6);
2225 unsigned Opc = 0;
2228 Opc = ARM::t2MOVCCi;
2230 Opc = ARM::t2MOVCCi16;
2233 Opc = ARM::t2MVNCCi;
2236 Opc = ARM::t2MOVCCi32imm;
2239 if (Opc) {
2243 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 5);
2256 unsigned Opc = 0;
2260 Opc = ARM::MOVCCi;
2262 Opc = ARM::MOVCCi16;
2265 Opc = ARM::MVNCCi;
2269 Opc = ARM::MOVCCi32imm;
2272 if (Opc) {
2276 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 5);
2352 unsigned Opc = 0;
2356 Opc = Subtarget->isThumb()
2361 Opc = ARM::VMOVScc;
2364 Opc = ARM::VMOVDcc;
2367 return CurDAG->SelectNodeTo(N, Opc, VT, Ops, 5);
2385 unsigned Opc;
2388 case ARMISD::CAND: Opc = ARM::t2ANDCCrs; break;
2389 case ARMISD::COR: Opc = ARM::t2ORRCCrs; break;
2390 case ARMISD::CXOR: Opc = ARM::t2EORCCrs; break;
2393 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 7);
2400 unsigned Opc;
2403 case ARMISD::CAND: Opc = ARM::t2ANDCCri; break;
2404 case ARMISD::COR: Opc = ARM::t2ORRCCri; break;
2405 case ARMISD::CXOR: Opc = ARM::t2EORCCri; break;
2409 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 6);
2413 unsigned Opc;
2416 case ARMISD::CAND: Opc = ARM::t2ANDCCrr; break;
2417 case ARMISD::COR: Opc = ARM::t2ORRCCrr; break;
2418 case ARMISD::CXOR: Opc = ARM::t2EORCCrr; break;
2421 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 6);
2428 unsigned Opc;
2431 case ARMISD::CAND: Opc = ARM::ANDCCrsi; break;
2432 case ARMISD::COR: Opc = ARM::ORRCCrsi; break;
2433 case ARMISD::CXOR: Opc = ARM::EORCCrsi; break;
2436 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 7);
2440 unsigned Opc;
2443 case ARMISD::CAND: Opc = ARM::ANDCCrsr; break;
2444 case ARMISD::COR: Opc = ARM::ORRCCrsr; break;
2445 case ARMISD::CXOR: Opc = ARM::EORCCrsr; break;
2448 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 8);
2455 unsigned Opc;
2458 case ARMISD::CAND: Opc = ARM::ANDCCri; break;
2459 case ARMISD::COR: Opc = ARM::ORRCCri; break;
2460 case ARMISD::CXOR: Opc = ARM::EORCCri; break;
2464 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 6);
2468 unsigned Opc;
2471 case ARMISD::CAND: Opc = ARM::ANDCCrr; break;
2472 case ARMISD::COR: Opc = ARM::ORRCCrr; break;
2473 case ARMISD::CXOR: Opc = ARM::EORCCrr; break;
2476 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 6);
2537 SDNode *ARMDAGToDAGISel::SelectAtomic64(SDNode *Node, unsigned Opc) {
2542 if (Opc == ARM::ATOMCMPXCHG6432) {
2549 SDNode *ResNode = CurDAG->getMachineNode(Opc, Node->getDebugLoc(),
2630 unsigned Opc = ((Subtarget->isThumb() && Subtarget->hasThumb2()) ?
2635 return CurDAG->SelectNodeTo(N, Opc, MVT::i32, Ops, 5);
2699 unsigned Opc = (Subtarget->isThumb() && Subtarget->hasThumb2())
2702 if (!Opc)
2722 return CurDAG->getMachineNode(Opc, dl, VT, Ops, 4);
2788 unsigned Opc = Subtarget->isThumb() ?
2803 SDNode *ResNode = CurDAG->getMachineNode(Opc, dl, MVT::Other,
2821 unsigned Opc = 0;
2825 case MVT::v8i8: Opc = ARM::VZIPd8; break;
2826 case MVT::v4i16: Opc = ARM::VZIPd16; break;
2829 case MVT::v2i32: Opc = ARM::VTRNd32; break;
2830 case MVT::v16i8: Opc = ARM::VZIPq8; break;
2831 case MVT::v8i16: Opc = ARM::VZIPq16; break;
2833 case MVT::v4i32: Opc = ARM::VZIPq32; break;
2838 return CurDAG->getMachineNode(Opc, dl, VT, VT, Ops, 4);
2841 unsigned Opc = 0;
2845 case MVT::v8i8: Opc = ARM::VUZPd8; break;
2846 case MVT::v4i16: Opc = ARM::VUZPd16; break;
2849 case MVT::v2i32: Opc = ARM::VTRNd32; break;
2850 case MVT::v16i8: Opc = ARM::VUZPq8; break;
2851 case MVT::v8i16: Opc = ARM::VUZPq16; break;
2853 case MVT::v4i32: Opc = ARM::VUZPq32; break;
2858 return CurDAG->getMachineNode(Opc, dl, VT, VT, Ops, 4);
2861 unsigned Opc = 0;
2865 case MVT::v8i8: Opc = ARM::VTRNd8; break;
2866 case MVT::v4i16: Opc = ARM::VTRNd16; break;
2868 case MVT::v2i32: Opc = ARM::VTRNd32; break;
2869 case MVT::v16i8: Opc = ARM::VTRNq8; break;
2870 case MVT::v8i16: Opc = ARM::VTRNq16; break;
2872 case MVT::v4i32: Opc = ARM::VTRNq32; break;
2877 return CurDAG->getMachineNode(Opc, dl, VT, VT, Ops, 4);
