Lines Matching refs:TargetLowering
173 : TargetLowering(TM, createTLOF(TM)) {
846 return TargetLowering::findRepresentativeClass(VT);
1034 return TargetLowering::getRegClassFor(VT);
3335 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
6651 TargetLowering::DAGCombinerInfo &DCI) {
6653 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
6712 TargetLowering::DAGCombinerInfo &DCI,
6772 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
6803 TargetLowering::DAGCombinerInfo &DCI,
6822 TargetLowering::DAGCombinerInfo &DCI,
6839 TargetLowering::DAGCombinerInfo &DCI) {
6861 TargetLowering::DAGCombinerInfo &DCI,
6889 TargetLowering::DAGCombinerInfo &DCI,
7016 TargetLowering::DAGCombinerInfo &DCI,
7060 TargetLowering::DAGCombinerInfo &DCI,
7247 TargetLowering::DAGCombinerInfo &DCI,
7268 TargetLowering::DAGCombinerInfo &DCI) {
7290 TargetLowering::DAGCombinerInfo &DCI) {
7351 TargetLowering::DAGCombinerInfo &DCI) {
7363 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
7504 TargetLowering::DAGCombinerInfo &DCI){
7538 TargetLowering::DAGCombinerInfo &DCI) {
7587 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
7617 TargetLowering::DAGCombinerInfo &DCI) {
7750 static bool CombineVLDDUP(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) {
7830 TargetLowering::DAGCombinerInfo &DCI) {
7895 TargetLowering::DAGCombinerInfo &DCI,
7931 TargetLowering::DAGCombinerInfo &DCI,
8188 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
8231 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
8987 return TargetLowering::getConstraintType(Constraint);
8993 TargetLowering::ConstraintWeight
9006 weight = TargetLowering::getSingleConstraintMatchWeight(info, constraint);
9067 return TargetLowering::getRegForInlineAsmConstraint(Constraint, VT);
9234 return TargetLowering::LowerAsmOperandForConstraint(Op, Constraint, Ops, DAG);
