Lines Matching refs:VA
1191 CCValAssign VA = RVLocs[i];
1194 if (VA.needsCustom()) {
1196 SDValue Lo = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32,
1200 VA = RVLocs[++i]; // skip ahead to next loc
1201 SDValue Hi = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32,
1207 if (VA.getLocVT() == MVT::v2f64) {
1212 VA = RVLocs[++i]; // skip ahead to next loc
1213 Lo = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, InFlag);
1216 VA = RVLocs[++i]; // skip ahead to next loc
1217 Hi = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), MVT::i32, InFlag);
1225 Val = DAG.getCopyFromReg(Chain, dl, VA.getLocReg(), VA.getLocVT(),
1231 switch (VA.getLocInfo()) {
1235 Val = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), Val);
1250 const CCValAssign &VA,
1252 unsigned LocMemOffset = VA.getLocMemOffset();
1263 CCValAssign &VA, CCValAssign &NextVA,
1270 RegsToPass.push_back(std::make_pair(VA.getLocReg(), fmrrd));
1346 CCValAssign &VA = ArgLocs[i];
1352 switch (VA.getLocInfo()) {
1356 Arg = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), Arg);
1359 Arg = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), Arg);
1362 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg);
1365 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg);
1370 if (VA.needsCustom()) {
1371 if (VA.getLocVT() == MVT::v2f64) {
1378 VA, ArgLocs[++i], StackPtr, MemOpChains, Flags);
1380 VA = ArgLocs[++i]; // skip ahead to next loc
1381 if (VA.isRegLoc()) {
1383 VA, ArgLocs[++i], StackPtr, MemOpChains, Flags);
1385 assert(VA.isMemLoc());
1388 dl, DAG, VA, Flags));
1391 PassF64ArgInRegs(dl, DAG, Chain, Arg, RegsToPass, VA, ArgLocs[++i],
1394 } else if (VA.isRegLoc()) {
1395 RegsToPass.push_back(std::make_pair(VA.getLocReg(), Arg));
1397 assert(VA.isMemLoc());
1418 unsigned LocMemOffset = VA.getLocMemOffset();
1434 assert(VA.isMemLoc());
1437 dl, DAG, VA, Flags));
1815 CCValAssign &VA = ArgLocs[i];
1816 EVT RegVT = VA.getLocVT();
1819 if (VA.getLocInfo() == CCValAssign::Indirect)
1821 if (VA.needsCustom()) {
1826 if (!VA.isRegLoc())
1836 } else if (!VA.isRegLoc()) {
1837 if (!MatchingStackOffset(Arg, VA.getLocMemOffset(), Flags,
1880 CCValAssign &VA = RVLocs[i];
1881 assert(VA.isRegLoc() && "Can only return in registers!");
1885 switch (VA.getLocInfo()) {
1889 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg);
1893 if (VA.needsCustom()) {
1894 if (VA.getLocVT() == MVT::v2f64) {
1901 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), HalfGPRs, Flag);
1903 VA = RVLocs[++i]; // skip ahead to next loc
1904 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(),
1907 VA = RVLocs[++i]; // skip ahead to next loc
1917 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), fmrrd, Flag);
1919 VA = RVLocs[++i]; // skip ahead to next loc
1920 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), fmrrd.getValue(1),
1923 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), Arg, Flag);
2452 ARMTargetLowering::GetF64FormalArgument(CCValAssign &VA, CCValAssign &NextVA,
2465 unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC);
2594 CCValAssign &VA = ArgLocs[i];
2597 if (VA.isRegLoc()) {
2598 EVT RegVT = VA.getLocVT();
2600 if (VA.needsCustom()) {
2603 if (VA.getLocVT() == MVT::v2f64) {
2604 SDValue ArgValue1 = GetF64FormalArgument(VA, ArgLocs[++i],
2606 VA = ArgLocs[++i]; // skip ahead to next loc
2608 if (VA.isMemLoc()) {
2609 int FI = MFI->CreateFixedObject(8, VA.getLocMemOffset(), true);
2615 ArgValue2 = GetF64FormalArgument(VA, ArgLocs[++i],
2624 ArgValue = GetF64FormalArgument(VA, ArgLocs[++i], Chain, DAG, dl);
2642 unsigned Reg = MF.addLiveIn(VA.getLocReg(), RC);
2649 switch (VA.getLocInfo()) {
2653 ArgValue = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), ArgValue);
2657 DAG.getValueType(VA.getValVT()));
2658 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue);
2662 DAG.getValueType(VA.getValVT()));
2663 ArgValue = DAG.getNode(ISD::TRUNCATE, dl, VA.getValVT(), ArgValue);
2669 } else { // VA.isRegLoc()
2672 assert(VA.isMemLoc());
2673 assert(VA.getValVT() != MVT::i64 && "i64 should already be lowered");
2694 VA.getLocMemOffset(), false);
2697 int FI = MFI->CreateFixedObject(VA.getLocVT().getSizeInBits()/8,
2698 VA.getLocMemOffset(), true);
2702 InVals.push_back(DAG.getLoad(VA.getValVT(), dl, Chain, FIN,